; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\STM324xG_EVAL\stm32f4xx_spi.o --asm_dir=.\STM324xG_EVAL\ --list_dir=.\STM324xG_EVAL\ --depend=.\STM324xG_EVAL\stm32f4xx_spi.d --cpu=Cortex-M4.fp --apcs=interwork -O0 -Otime -I..\ -I..\..\..\Libraries\CMSIS\Device\ST\STM32F4xx\Include -I..\..\..\Libraries\STM32F4xx_StdPeriph_Driver\inc -I..\..\..\Utilities\STM32_EVAL\Common -I..\..\..\Utilities\STM32_EVAL\STM3240_41_G_EVAL -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\Inc\ST\STM32F4xx -D__MICROLIB -DUSE_STM324xG_EVAL -DSTM32F4XX -DUSE_STDPERIPH_DRIVER --omf_browse=.\STM324xG_EVAL\stm32f4xx_spi.crf ..\..\..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_spi.c]
                          THUMB

                          AREA ||i.I2S_Cmd||, CODE, READONLY, ALIGN=1

                  I2S_Cmd PROC
;;;534      */
;;;535    void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
000000  b121              CBZ      r1,|L1.12|
;;;536    {
;;;537      /* Check the parameters */
;;;538      assert_param(IS_SPI_23_PERIPH_EXT(SPIx));
;;;539      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;540      
;;;541      if (NewState != DISABLE)
;;;542      {
;;;543        /* Enable the selected SPI peripheral (in I2S mode) */
;;;544        SPIx->I2SCFGR |= SPI_I2SCFGR_I2SE;
000002  8b82              LDRH     r2,[r0,#0x1c]
000004  f4426280          ORR      r2,r2,#0x400
000008  8382              STRH     r2,[r0,#0x1c]
00000a  e004              B        |L1.22|
                  |L1.12|
;;;545      }
;;;546      else
;;;547      {
;;;548        /* Disable the selected SPI peripheral in I2S mode */
;;;549        SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SE);
00000c  8b82              LDRH     r2,[r0,#0x1c]
00000e  f64f33ff          MOV      r3,#0xfbff
000012  401a              ANDS     r2,r2,r3
000014  8382              STRH     r2,[r0,#0x1c]
                  |L1.22|
;;;550      }
;;;551    }
000016  4770              BX       lr
;;;552    
                          ENDP


                          AREA ||i.I2S_FullDuplexConfig||, CODE, READONLY, ALIGN=1

                  I2S_FullDuplexConfig PROC
;;;699      */
;;;700    void I2S_FullDuplexConfig(SPI_TypeDef* I2Sxext, I2S_InitTypeDef* I2S_InitStruct)
000000  b530              PUSH     {r4,r5,lr}
;;;701    {
;;;702      uint16_t tmpreg = 0, tmp = 0;
000002  2200              MOVS     r2,#0
000004  2300              MOVS     r3,#0
;;;703      
;;;704      /* Check the I2S parameters */
;;;705      assert_param(IS_I2S_EXT_PERIPH(I2Sxext));
;;;706      assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
;;;707      assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
;;;708      assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
;;;709      assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));  
;;;710    
;;;711    /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
;;;712      /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
;;;713      I2Sxext->I2SCFGR &= I2SCFGR_CLEAR_MASK; 
000006  8b84              LDRH     r4,[r0,#0x1c]
000008  f24f0540          MOV      r5,#0xf040
00000c  402c              ANDS     r4,r4,r5
00000e  8384              STRH     r4,[r0,#0x1c]
;;;714      I2Sxext->I2SPR = 0x0002;
000010  2402              MOVS     r4,#2
000012  8404              STRH     r4,[r0,#0x20]
;;;715      
;;;716      /* Get the I2SCFGR register value */
;;;717      tmpreg = I2Sxext->I2SCFGR;
000014  8b82              LDRH     r2,[r0,#0x1c]
;;;718      
;;;719      /* Get the mode to be configured for the extended I2S */
;;;720      if ((I2S_InitStruct->I2S_Mode == I2S_Mode_MasterTx) || (I2S_InitStruct->I2S_Mode == I2S_Mode_SlaveTx))
000016  880c              LDRH     r4,[r1,#0]
000018  f5b47f00          CMP      r4,#0x200
00001c  d001              BEQ      |L2.34|
00001e  880c              LDRH     r4,[r1,#0]
000020  b914              CBNZ     r4,|L2.40|
                  |L2.34|
;;;721      {
;;;722        tmp = I2S_Mode_SlaveRx;
000022  f44f7380          MOV      r3,#0x100
000026  e008              B        |L2.58|
                  |L2.40|
;;;723      }
;;;724      else
;;;725      {
;;;726        if ((I2S_InitStruct->I2S_Mode == I2S_Mode_MasterRx) || (I2S_InitStruct->I2S_Mode == I2S_Mode_SlaveRx))
000028  880c              LDRH     r4,[r1,#0]
00002a  f5b47f40          CMP      r4,#0x300
00002e  d003              BEQ      |L2.56|
000030  880c              LDRH     r4,[r1,#0]
000032  f5b47f80          CMP      r4,#0x100
000036  d100              BNE      |L2.58|
                  |L2.56|
;;;727        {
;;;728          tmp = I2S_Mode_SlaveTx;
000038  2300              MOVS     r3,#0
                  |L2.58|
;;;729        }
;;;730      }
;;;731    
;;;732     
;;;733      /* Configure the I2S with the SPI_InitStruct values */
;;;734      tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \
00003a  888c              LDRH     r4,[r1,#4]
00003c  898d              LDRH     r5,[r1,#0xc]
00003e  432c              ORRS     r4,r4,r5
000040  884d              LDRH     r5,[r1,#2]
000042  432c              ORRS     r4,r4,r5
000044  431c              ORRS     r4,r4,r3
000046  f4446400          ORR      r4,r4,#0x800
00004a  4322              ORRS     r2,r2,r4
;;;735                      (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
;;;736                      (uint16_t)I2S_InitStruct->I2S_CPOL))));
;;;737     
;;;738      /* Write to SPIx I2SCFGR */  
;;;739      I2Sxext->I2SCFGR = tmpreg;
00004c  8382              STRH     r2,[r0,#0x1c]
;;;740    }
00004e  bd30              POP      {r4,r5,pc}
;;;741    
                          ENDP


                          AREA ||i.I2S_Init||, CODE, READONLY, ALIGN=2

                  I2S_Init PROC
;;;320      */
;;;321    void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
000000  e92d4ff0          PUSH     {r4-r11,lr}
;;;322    {
;;;323      uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
000004  2500              MOVS     r5,#0
000006  2302              MOVS     r3,#2
000008  2400              MOVS     r4,#0
00000a  2701              MOVS     r7,#1
;;;324      uint32_t tmp = 0, i2sclk = 0;
00000c  2200              MOVS     r2,#0
00000e  2600              MOVS     r6,#0
;;;325    #ifndef I2S_EXTERNAL_CLOCK_VAL
;;;326      uint32_t pllm = 0, plln = 0, pllr = 0;
000010  4694              MOV      r12,r2
000012  4690              MOV      r8,r2
000014  4691              MOV      r9,r2
;;;327    #endif /* I2S_EXTERNAL_CLOCK_VAL */
;;;328      
;;;329      /* Check the I2S parameters */
;;;330      assert_param(IS_SPI_23_PERIPH(SPIx));
;;;331      assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
;;;332      assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
;;;333      assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
;;;334      assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
;;;335      assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
;;;336      assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));  
;;;337    
;;;338    /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
;;;339      /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
;;;340      SPIx->I2SCFGR &= I2SCFGR_CLEAR_MASK; 
000016  f8b0a01c          LDRH     r10,[r0,#0x1c]
00001a  f24f0b40          MOV      r11,#0xf040
00001e  ea0a0a0b          AND      r10,r10,r11
000022  f8a0a01c          STRH     r10,[r0,#0x1c]
;;;341      SPIx->I2SPR = 0x0002;
000026  f04f0a02          MOV      r10,#2
00002a  f8a0a020          STRH     r10,[r0,#0x20]
;;;342      
;;;343      /* Get the I2SCFGR register value */
;;;344      tmpreg = SPIx->I2SCFGR;
00002e  8b85              LDRH     r5,[r0,#0x1c]
;;;345      
;;;346      /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
;;;347      if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
000030  f8d1a008          LDR      r10,[r1,#8]
000034  f1ba0f02          CMP      r10,#2
000038  d101              BNE      |L3.62|
;;;348      {
;;;349        i2sodd = (uint16_t)0;
00003a  bf00              NOP      
;;;350        i2sdiv = (uint16_t)2;   
00003c  e067              B        |L3.270|
                  |L3.62|
;;;351      }
;;;352      /* If the requested audio frequency is not the default, compute the prescaler */
;;;353      else
;;;354      {
;;;355        /* Check the frame length (For the Prescaler computing) *******************/
;;;356        if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
00003e  f8b1a004          LDRH     r10,[r1,#4]
000042  f1ba0f00          CMP      r10,#0
000046  d101              BNE      |L3.76|
;;;357        {
;;;358          /* Packet length is 16 bits */
;;;359          packetlength = 1;
000048  2701              MOVS     r7,#1
00004a  e000              B        |L3.78|
                  |L3.76|
;;;360        }
;;;361        else
;;;362        {
;;;363          /* Packet length is 32 bits */
;;;364          packetlength = 2;
00004c  2702              MOVS     r7,#2
                  |L3.78|
;;;365        }
;;;366    
;;;367        /* Get I2S source Clock frequency  ****************************************/
;;;368          
;;;369        /* If an external I2S clock has to be used, this define should be set  
;;;370           in the project configuration or in the stm32f4xx_conf.h file */
;;;371      #ifdef I2S_EXTERNAL_CLOCK_VAL     
;;;372        /* Set external clock as I2S clock source */
;;;373        if ((RCC->CFGR & RCC_CFGR_I2SSRC) == 0)
;;;374        {
;;;375          RCC->CFGR |= (uint32_t)RCC_CFGR_I2SSRC;
;;;376        }
;;;377        
;;;378        /* Set the I2S clock to the external clock  value */
;;;379        i2sclk = I2S_EXTERNAL_CLOCK_VAL;
;;;380    
;;;381      #else /* There is no define for External I2S clock source */
;;;382        /* Set PLLI2S as I2S clock source */
;;;383        if ((RCC->CFGR & RCC_CFGR_I2SSRC) != 0)
00004e  f8dfa104          LDR      r10,|L3.340|
000052  f8daa000          LDR      r10,[r10,#0]
000056  f41a0f00          TST      r10,#0x800000
00005a  d009              BEQ      |L3.112|
;;;384        {
;;;385          RCC->CFGR &= ~(uint32_t)RCC_CFGR_I2SSRC;
00005c  f8dfa0f4          LDR      r10,|L3.340|
000060  f8daa000          LDR      r10,[r10,#0]
000064  f42a0a00          BIC      r10,r10,#0x800000
000068  f8dfb0e8          LDR      r11,|L3.340|
00006c  f8cba000          STR      r10,[r11,#0]
                  |L3.112|
;;;386        }    
;;;387        
;;;388        /* Get the PLLI2SN value */
;;;389        plln = (uint32_t)(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6) & \
000070  f8dfa0e0          LDR      r10,|L3.340|
000074  f10a0a7c          ADD      r10,r10,#0x7c
000078  f8daa000          LDR      r10,[r10,#0]
00007c  f3ca1888          UBFX     r8,r10,#6,#9
;;;390                          (RCC_PLLI2SCFGR_PLLI2SN >> 6));
;;;391        
;;;392        /* Get the PLLI2SR value */
;;;393        pllr = (uint32_t)(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28) & \
000080  f8dfa0d0          LDR      r10,|L3.340|
000084  f10a0a7c          ADD      r10,r10,#0x7c
000088  f8daa000          LDR      r10,[r10,#0]
00008c  f3ca7902          UBFX     r9,r10,#28,#3
;;;394                          (RCC_PLLI2SCFGR_PLLI2SR >> 28));
;;;395        
;;;396        /* Get the PLLM value */
;;;397        pllm = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);      
000090  f8dfa0c0          LDR      r10,|L3.340|
000094  f1aa0a04          SUB      r10,r10,#4
000098  f8daa000          LDR      r10,[r10,#0]
00009c  f00a0c3f          AND      r12,r10,#0x3f
;;;398        
;;;399        /* Get the I2S source clock value */
;;;400        i2sclk = (uint32_t)(((HSE_VALUE / pllm) * plln) / pllr);
0000a0  f8dfa0b4          LDR      r10,|L3.344|
0000a4  fbbafafc          UDIV     r10,r10,r12
0000a8  fb0afa08          MUL      r10,r10,r8
0000ac  fbbaf6f9          UDIV     r6,r10,r9
;;;401      #endif /* I2S_EXTERNAL_CLOCK_VAL */
;;;402        
;;;403        /* Compute the Real divider depending on the MCLK output state, with a floating point */
;;;404        if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
0000b0  f8b1a006          LDRH     r10,[r1,#6]
0000b4  f5ba7f00          CMP      r10,#0x200
0000b8  d10e              BNE      |L3.216|
;;;405        {
;;;406          /* MCLK output is enabled */
;;;407          tmp = (uint16_t)(((((i2sclk / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
0000ba  ea4f2a16          LSR      r10,r6,#8
0000be  eb0a0a8a          ADD      r10,r10,r10,LSL #2
0000c2  ea4f0a4a          LSL      r10,r10,#1
0000c6  f8d1b008          LDR      r11,[r1,#8]
0000ca  fbbafafb          UDIV     r10,r10,r11
0000ce  f10a0a05          ADD      r10,r10,#5
0000d2  fa1ff28a          UXTH     r2,r10
0000d6  e00f              B        |L3.248|
                  |L3.216|
;;;408        }
;;;409        else
;;;410        {
;;;411          /* MCLK output is disabled */
;;;412          tmp = (uint16_t)(((((i2sclk / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
0000d8  ea4f1a47          LSL      r10,r7,#5
0000dc  fbb6fafa          UDIV     r10,r6,r10
0000e0  eb0a0a8a          ADD      r10,r10,r10,LSL #2
0000e4  ea4f0a4a          LSL      r10,r10,#1
0000e8  f8d1b008          LDR      r11,[r1,#8]
0000ec  fbbafafb          UDIV     r10,r10,r11
0000f0  f10a0a05          ADD      r10,r10,#5
0000f4  fa1ff28a          UXTH     r2,r10
                  |L3.248|
;;;413        }
;;;414        
;;;415        /* Remove the flatting point */
;;;416        tmp = tmp / 10;  
0000f8  f04f0a0a          MOV      r10,#0xa
0000fc  fbb2f2fa          UDIV     r2,r2,r10
;;;417          
;;;418        /* Check the parity of the divider */
;;;419        i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
000100  f0020401          AND      r4,r2,#1
;;;420       
;;;421        /* Compute the i2sdiv prescaler */
;;;422        i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
000104  eba20a04          SUB      r10,r2,r4
000108  f3ca034f          UBFX     r3,r10,#1,#16
;;;423       
;;;424        /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
;;;425        i2sodd = (uint16_t) (i2sodd << 8);
00010c  0224              LSLS     r4,r4,#8
                  |L3.270|
;;;426      }
;;;427    
;;;428      /* Test if the divider is 1 or 0 or greater than 0xFF */
;;;429      if ((i2sdiv < 2) || (i2sdiv > 0xFF))
00010e  2b02              CMP      r3,#2
000110  db01              BLT      |L3.278|
000112  2bff              CMP      r3,#0xff
000114  dd01              BLE      |L3.282|
                  |L3.278|
;;;430      {
;;;431        /* Set the default values */
;;;432        i2sdiv = 2;
000116  2302              MOVS     r3,#2
;;;433        i2sodd = 0;
000118  2400              MOVS     r4,#0
                  |L3.282|
;;;434      }
;;;435    
;;;436      /* Write to SPIx I2SPR register the computed value */
;;;437      SPIx->I2SPR = (uint16_t)((uint16_t)i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
00011a  f8b1a006          LDRH     r10,[r1,#6]
00011e  ea4a0a04          ORR      r10,r10,r4
000122  ea4a0a03          ORR      r10,r10,r3
000126  f8a0a020          STRH     r10,[r0,#0x20]
;;;438     
;;;439      /* Configure the I2S with the SPI_InitStruct values */
;;;440      tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(I2S_InitStruct->I2S_Mode | \
00012a  f8b1a004          LDRH     r10,[r1,#4]
00012e  f8b1b00c          LDRH     r11,[r1,#0xc]
000132  ea4a0a0b          ORR      r10,r10,r11
000136  f8b1b002          LDRH     r11,[r1,#2]
00013a  ea4a0a0b          ORR      r10,r10,r11
00013e  f8b1b000          LDRH     r11,[r1,#0]
000142  ea4a0a0b          ORR      r10,r10,r11
000146  f44a6a00          ORR      r10,r10,#0x800
00014a  ea4a0505          ORR      r5,r10,r5
;;;441                      (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
;;;442                      (uint16_t)I2S_InitStruct->I2S_CPOL))));
;;;443     
;;;444      /* Write to SPIx I2SCFGR */  
;;;445      SPIx->I2SCFGR = tmpreg;
00014e  8385              STRH     r5,[r0,#0x1c]
;;;446    }
000150  e8bd8ff0          POP      {r4-r11,pc}
;;;447    
                          ENDP

                  |L3.340|
                          DCD      0x40023808
                  |L3.344|
                          DCD      0x017d7840

                          AREA ||i.I2S_StructInit||, CODE, READONLY, ALIGN=1

                  I2S_StructInit PROC
;;;480      */
;;;481    void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
000000  2100              MOVS     r1,#0
;;;482    {
;;;483    /*--------------- Reset I2S init structure parameters values -----------------*/
;;;484      /* Initialize the I2S_Mode member */
;;;485      I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
000002  8001              STRH     r1,[r0,#0]
;;;486      
;;;487      /* Initialize the I2S_Standard member */
;;;488      I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
000004  8041              STRH     r1,[r0,#2]
;;;489      
;;;490      /* Initialize the I2S_DataFormat member */
;;;491      I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
000006  8081              STRH     r1,[r0,#4]
;;;492      
;;;493      /* Initialize the I2S_MCLKOutput member */
;;;494      I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
000008  80c1              STRH     r1,[r0,#6]
;;;495      
;;;496      /* Initialize the I2S_AudioFreq member */
;;;497      I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
00000a  2102              MOVS     r1,#2
00000c  6081              STR      r1,[r0,#8]
;;;498      
;;;499      /* Initialize the I2S_CPOL member */
;;;500      I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
00000e  2100              MOVS     r1,#0
000010  8181              STRH     r1,[r0,#0xc]
;;;501    }
000012  4770              BX       lr
;;;502    
                          ENDP


                          AREA ||i.SPI_BiDirectionalLineConfig||, CODE, READONLY, ALIGN=1

                  SPI_BiDirectionalLineConfig PROC
;;;581      */
;;;582    void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
000000  f5b14f80          CMP      r1,#0x4000
;;;583    {
;;;584      /* Check the parameters */
;;;585      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;586      assert_param(IS_SPI_DIRECTION(SPI_Direction));
;;;587      if (SPI_Direction == SPI_Direction_Tx)
000004  d104              BNE      |L5.16|
;;;588      {
;;;589        /* Set the Tx only mode */
;;;590        SPIx->CR1 |= SPI_Direction_Tx;
000006  8802              LDRH     r2,[r0,#0]
000008  f4424280          ORR      r2,r2,#0x4000
00000c  8002              STRH     r2,[r0,#0]
00000e  e004              B        |L5.26|
                  |L5.16|
;;;591      }
;;;592      else
;;;593      {
;;;594        /* Set the Rx only mode */
;;;595        SPIx->CR1 &= SPI_Direction_Rx;
000010  8802              LDRH     r2,[r0,#0]
000012  f64b73ff          MOV      r3,#0xbfff
000016  401a              ANDS     r2,r2,r3
000018  8002              STRH     r2,[r0,#0]
                  |L5.26|
;;;596      }
;;;597    }
00001a  4770              BX       lr
;;;598    
                          ENDP


                          AREA ||i.SPI_CalculateCRC||, CODE, READONLY, ALIGN=1

                  SPI_CalculateCRC PROC
;;;879      */
;;;880    void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
000000  b121              CBZ      r1,|L6.12|
;;;881    {
;;;882      /* Check the parameters */
;;;883      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;884      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;885      if (NewState != DISABLE)
;;;886      {
;;;887        /* Enable the selected SPI CRC calculation */
;;;888        SPIx->CR1 |= SPI_CR1_CRCEN;
000002  8802              LDRH     r2,[r0,#0]
000004  f4425200          ORR      r2,r2,#0x2000
000008  8002              STRH     r2,[r0,#0]
00000a  e004              B        |L6.22|
                  |L6.12|
;;;889      }
;;;890      else
;;;891      {
;;;892        /* Disable the selected SPI CRC calculation */
;;;893        SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN);
00000c  8802              LDRH     r2,[r0,#0]
00000e  f64d73ff          MOV      r3,#0xdfff
000012  401a              ANDS     r2,r2,r3
000014  8002              STRH     r2,[r0,#0]
                  |L6.22|
;;;894      }
;;;895    }
000016  4770              BX       lr
;;;896    
                          ENDP


                          AREA ||i.SPI_Cmd||, CODE, READONLY, ALIGN=1

                  SPI_Cmd PROC
;;;509      */
;;;510    void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
000000  b121              CBZ      r1,|L7.12|
;;;511    {
;;;512      /* Check the parameters */
;;;513      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;514      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;515      if (NewState != DISABLE)
;;;516      {
;;;517        /* Enable the selected SPI peripheral */
;;;518        SPIx->CR1 |= SPI_CR1_SPE;
000002  8802              LDRH     r2,[r0,#0]
000004  f0420240          ORR      r2,r2,#0x40
000008  8002              STRH     r2,[r0,#0]
00000a  e004              B        |L7.22|
                  |L7.12|
;;;519      }
;;;520      else
;;;521      {
;;;522        /* Disable the selected SPI peripheral */
;;;523        SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE);
00000c  8802              LDRH     r2,[r0,#0]
00000e  f64f73bf          MOV      r3,#0xffbf
000012  401a              ANDS     r2,r2,r3
000014  8002              STRH     r2,[r0,#0]
                  |L7.22|
;;;524      }
;;;525    }
000016  4770              BX       lr
;;;526    
                          ENDP


                          AREA ||i.SPI_DataSizeConfig||, CODE, READONLY, ALIGN=1

                  SPI_DataSizeConfig PROC
;;;561      */
;;;562    void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
000000  8802              LDRH     r2,[r0,#0]
;;;563    {
;;;564      /* Check the parameters */
;;;565      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;566      assert_param(IS_SPI_DATASIZE(SPI_DataSize));
;;;567      /* Clear DFF bit */
;;;568      SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
000002  f24f73ff          MOV      r3,#0xf7ff
000006  401a              ANDS     r2,r2,r3
000008  8002              STRH     r2,[r0,#0]
;;;569      /* Set new DFF bit value */
;;;570      SPIx->CR1 |= SPI_DataSize;
00000a  8802              LDRH     r2,[r0,#0]
00000c  430a              ORRS     r2,r2,r1
00000e  8002              STRH     r2,[r0,#0]
;;;571    }
000010  4770              BX       lr
;;;572    
                          ENDP


                          AREA ||i.SPI_GetCRC||, CODE, READONLY, ALIGN=1

                  SPI_GetCRC PROC
;;;919      */
;;;920    uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
000000  4602              MOV      r2,r0
;;;921    {
;;;922      uint16_t crcreg = 0;
000002  2000              MOVS     r0,#0
;;;923      /* Check the parameters */
;;;924      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;925      assert_param(IS_SPI_CRC(SPI_CRC));
;;;926      if (SPI_CRC != SPI_CRC_Rx)
000004  2901              CMP      r1,#1
000006  d001              BEQ      |L9.12|
;;;927      {
;;;928        /* Get the Tx CRC register */
;;;929        crcreg = SPIx->TXCRCR;
000008  8b10              LDRH     r0,[r2,#0x18]
00000a  e000              B        |L9.14|
                  |L9.12|
;;;930      }
;;;931      else
;;;932      {
;;;933        /* Get the Rx CRC register */
;;;934        crcreg = SPIx->RXCRCR;
00000c  8a90              LDRH     r0,[r2,#0x14]
                  |L9.14|
;;;935      }
;;;936      /* Return the selected CRC register */
;;;937      return crcreg;
;;;938    }
00000e  4770              BX       lr
;;;939    
                          ENDP


                          AREA ||i.SPI_GetCRCPolynomial||, CODE, READONLY, ALIGN=1

                  SPI_GetCRCPolynomial PROC
;;;944      */
;;;945    uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
000000  4601              MOV      r1,r0
;;;946    {
;;;947      /* Check the parameters */
;;;948      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;949      
;;;950      /* Return the CRC polynomial register */
;;;951      return SPIx->CRCPR;
000002  8a08              LDRH     r0,[r1,#0x10]
;;;952    }
000004  4770              BX       lr
;;;953    
                          ENDP


                          AREA ||i.SPI_I2S_ClearFlag||, CODE, READONLY, ALIGN=1

                  SPI_I2S_ClearFlag PROC
;;;1175     */
;;;1176   void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
000000  43ca              MVNS     r2,r1
;;;1177   {
;;;1178     /* Check the parameters */
;;;1179     assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
;;;1180     assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
;;;1181       
;;;1182     /* Clear the selected SPI CRC Error (CRCERR) flag */
;;;1183     SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
000002  8102              STRH     r2,[r0,#8]
;;;1184   }
000004  4770              BX       lr
;;;1185   
                          ENDP


                          AREA ||i.SPI_I2S_ClearITPendingBit||, CODE, READONLY, ALIGN=1

                  SPI_I2S_ClearITPendingBit PROC
;;;1255     */
;;;1256   void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
000000  b510              PUSH     {r4,lr}
;;;1257   {
;;;1258     uint16_t itpos = 0;
000002  2200              MOVS     r2,#0
;;;1259     /* Check the parameters */
;;;1260     assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
;;;1261     assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
;;;1262   
;;;1263     /* Get the SPI_I2S IT index */
;;;1264     itpos = 0x01 << (SPI_I2S_IT & 0x0F);
000004  f001040f          AND      r4,r1,#0xf
000008  2301              MOVS     r3,#1
00000a  40a3              LSLS     r3,r3,r4
00000c  b29a              UXTH     r2,r3
;;;1265   
;;;1266     /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
;;;1267     SPIx->SR = (uint16_t)~itpos;
00000e  43d3              MVNS     r3,r2
000010  8103              STRH     r3,[r0,#8]
;;;1268   }
000012  bd10              POP      {r4,pc}
;;;1269   
                          ENDP


                          AREA ||i.SPI_I2S_DMACmd||, CODE, READONLY, ALIGN=1

                  SPI_I2S_DMACmd PROC
;;;981      */
;;;982    void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
000000  b510              PUSH     {r4,lr}
;;;983    {
;;;984      /* Check the parameters */
;;;985      assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
;;;986      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;987      assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
;;;988    
;;;989      if (NewState != DISABLE)
000002  b11a              CBZ      r2,|L13.12|
;;;990      {
;;;991        /* Enable the selected SPI DMA requests */
;;;992        SPIx->CR2 |= SPI_I2S_DMAReq;
000004  8883              LDRH     r3,[r0,#4]
000006  430b              ORRS     r3,r3,r1
000008  8083              STRH     r3,[r0,#4]
00000a  e004              B        |L13.22|
                  |L13.12|
;;;993      }
;;;994      else
;;;995      {
;;;996        /* Disable the selected SPI DMA requests */
;;;997        SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
00000c  8883              LDRH     r3,[r0,#4]
00000e  43cc              MVNS     r4,r1
000010  b2a4              UXTH     r4,r4
000012  4023              ANDS     r3,r3,r4
000014  8083              STRH     r3,[r0,#4]
                  |L13.22|
;;;998      }
;;;999    }
000016  bd10              POP      {r4,pc}
;;;1000   
                          ENDP


                          AREA ||i.SPI_I2S_DeInit||, CODE, READONLY, ALIGN=2

                  SPI_I2S_DeInit PROC
;;;217      */
;;;218    void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
000000  b510              PUSH     {r4,lr}
;;;219    {
000002  4604              MOV      r4,r0
;;;220      /* Check the parameters */
;;;221      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;222    
;;;223      if (SPIx == SPI1)
000004  4811              LDR      r0,|L14.76|
000006  4284              CMP      r4,r0
000008  d108              BNE      |L14.28|
;;;224      {
;;;225        /* Enable SPI1 reset state */
;;;226        RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
00000a  2101              MOVS     r1,#1
00000c  1480              ASRS     r0,r0,#18
00000e  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;227        /* Release SPI1 from reset state */
;;;228        RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
000012  2100              MOVS     r1,#0
000014  14a0              ASRS     r0,r4,#18
000016  f7fffffe          BL       RCC_APB2PeriphResetCmd
00001a  e016              B        |L14.74|
                  |L14.28|
;;;229      }
;;;230      else if (SPIx == SPI2)
00001c  480c              LDR      r0,|L14.80|
00001e  4284              CMP      r4,r0
000020  d108              BNE      |L14.52|
;;;231      {
;;;232        /* Enable SPI2 reset state */
;;;233        RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
000022  2101              MOVS     r1,#1
000024  1400              ASRS     r0,r0,#16
000026  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;234        /* Release SPI2 from reset state */
;;;235        RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
00002a  2100              MOVS     r1,#0
00002c  1420              ASRS     r0,r4,#16
00002e  f7fffffe          BL       RCC_APB1PeriphResetCmd
000032  e00a              B        |L14.74|
                  |L14.52|
;;;236        }
;;;237      else
;;;238      {
;;;239        if (SPIx == SPI3)
000034  4807              LDR      r0,|L14.84|
000036  4284              CMP      r4,r0
000038  d107              BNE      |L14.74|
;;;240        {
;;;241          /* Enable SPI3 reset state */
;;;242          RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
00003a  2101              MOVS     r1,#1
00003c  13c0              ASRS     r0,r0,#15
00003e  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;243          /* Release SPI3 from reset state */
;;;244          RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
000042  2100              MOVS     r1,#0
000044  13e0              ASRS     r0,r4,#15
000046  f7fffffe          BL       RCC_APB1PeriphResetCmd
                  |L14.74|
;;;245        }
;;;246      }
;;;247    }
00004a  bd10              POP      {r4,pc}
;;;248    
                          ENDP

                  |L14.76|
                          DCD      0x40013000
                  |L14.80|
                          DCD      0x40003800
                  |L14.84|
                          DCD      0x40003c00

                          AREA ||i.SPI_I2S_GetFlagStatus||, CODE, READONLY, ALIGN=1

                  SPI_I2S_GetFlagStatus PROC
;;;1134     */
;;;1135   FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
000000  4602              MOV      r2,r0
;;;1136   {
;;;1137     FlagStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;1138     /* Check the parameters */
;;;1139     assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
;;;1140     assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
;;;1141     
;;;1142     /* Check the status of the specified SPI flag */
;;;1143     if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
000004  8913              LDRH     r3,[r2,#8]
000006  420b              TST      r3,r1
000008  d001              BEQ      |L15.14|
;;;1144     {
;;;1145       /* SPI_I2S_FLAG is set */
;;;1146       bitstatus = SET;
00000a  2001              MOVS     r0,#1
00000c  e000              B        |L15.16|
                  |L15.14|
;;;1147     }
;;;1148     else
;;;1149     {
;;;1150       /* SPI_I2S_FLAG is reset */
;;;1151       bitstatus = RESET;
00000e  2000              MOVS     r0,#0
                  |L15.16|
;;;1152     }
;;;1153     /* Return the SPI_I2S_FLAG status */
;;;1154     return  bitstatus;
;;;1155   }
000010  4770              BX       lr
;;;1156   
                          ENDP


                          AREA ||i.SPI_I2S_GetITStatus||, CODE, READONLY, ALIGN=1

                  SPI_I2S_GetITStatus PROC
;;;1200     */
;;;1201   ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
000000  b570              PUSH     {r4-r6,lr}
;;;1202   {
000002  4602              MOV      r2,r0
;;;1203     ITStatus bitstatus = RESET;
000004  2000              MOVS     r0,#0
;;;1204     uint16_t itpos = 0, itmask = 0, enablestatus = 0;
000006  2400              MOVS     r4,#0
000008  2300              MOVS     r3,#0
00000a  4684              MOV      r12,r0
;;;1205   
;;;1206     /* Check the parameters */
;;;1207     assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
;;;1208     assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
;;;1209   
;;;1210     /* Get the SPI_I2S_IT index */
;;;1211     itpos = 0x01 << (SPI_I2S_IT & 0x0F);
00000c  f001060f          AND      r6,r1,#0xf
000010  2501              MOVS     r5,#1
000012  40b5              LSLS     r5,r5,r6
000014  b2ac              UXTH     r4,r5
;;;1212   
;;;1213     /* Get the SPI_I2S_IT IT mask */
;;;1214     itmask = SPI_I2S_IT >> 4;
000016  110b              ASRS     r3,r1,#4
;;;1215   
;;;1216     /* Set the IT mask */
;;;1217     itmask = 0x01 << itmask;
000018  2501              MOVS     r5,#1
00001a  409d              LSLS     r5,r5,r3
00001c  b2ab              UXTH     r3,r5
;;;1218   
;;;1219     /* Get the SPI_I2S_IT enable bit status */
;;;1220     enablestatus = (SPIx->CR2 & itmask) ;
00001e  8895              LDRH     r5,[r2,#4]
000020  ea050c03          AND      r12,r5,r3
;;;1221   
;;;1222     /* Check the status of the specified SPI interrupt */
;;;1223     if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
000024  8915              LDRH     r5,[r2,#8]
000026  4225              TST      r5,r4
000028  d004              BEQ      |L16.52|
00002a  f1bc0f00          CMP      r12,#0
00002e  d001              BEQ      |L16.52|
;;;1224     {
;;;1225       /* SPI_I2S_IT is set */
;;;1226       bitstatus = SET;
000030  2001              MOVS     r0,#1
000032  e000              B        |L16.54|
                  |L16.52|
;;;1227     }
;;;1228     else
;;;1229     {
;;;1230       /* SPI_I2S_IT is reset */
;;;1231       bitstatus = RESET;
000034  2000              MOVS     r0,#0
                  |L16.54|
;;;1232     }
;;;1233     /* Return the SPI_I2S_IT status */
;;;1234     return bitstatus;
;;;1235   }
000036  bd70              POP      {r4-r6,pc}
;;;1236   
                          ENDP


                          AREA ||i.SPI_I2S_ITConfig||, CODE, READONLY, ALIGN=1

                  SPI_I2S_ITConfig PROC
;;;1090     */
;;;1091   void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
000000  b530              PUSH     {r4,r5,lr}
;;;1092   {
;;;1093     uint16_t itpos = 0, itmask = 0 ;
000002  f04f0c00          MOV      r12,#0
000006  2300              MOVS     r3,#0
;;;1094     
;;;1095     /* Check the parameters */
;;;1096     assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
;;;1097     assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;1098     assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
;;;1099   
;;;1100     /* Get the SPI IT index */
;;;1101     itpos = SPI_I2S_IT >> 4;
000008  ea4f1c21          ASR      r12,r1,#4
;;;1102   
;;;1103     /* Set the IT mask */
;;;1104     itmask = (uint16_t)1 << (uint16_t)itpos;
00000c  2401              MOVS     r4,#1
00000e  fa04f40c          LSL      r4,r4,r12
000012  b2a3              UXTH     r3,r4
;;;1105   
;;;1106     if (NewState != DISABLE)
000014  b11a              CBZ      r2,|L17.30|
;;;1107     {
;;;1108       /* Enable the selected SPI interrupt */
;;;1109       SPIx->CR2 |= itmask;
000016  8884              LDRH     r4,[r0,#4]
000018  431c              ORRS     r4,r4,r3
00001a  8084              STRH     r4,[r0,#4]
00001c  e004              B        |L17.40|
                  |L17.30|
;;;1110     }
;;;1111     else
;;;1112     {
;;;1113       /* Disable the selected SPI interrupt */
;;;1114       SPIx->CR2 &= (uint16_t)~itmask;
00001e  8884              LDRH     r4,[r0,#4]
000020  43dd              MVNS     r5,r3
000022  b2ad              UXTH     r5,r5
000024  402c              ANDS     r4,r4,r5
000026  8084              STRH     r4,[r0,#4]
                  |L17.40|
;;;1115     }
;;;1116   }
000028  bd30              POP      {r4,r5,pc}
;;;1117   
                          ENDP


                          AREA ||i.SPI_I2S_ReceiveData||, CODE, READONLY, ALIGN=1

                  SPI_I2S_ReceiveData PROC
;;;774      */
;;;775    uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
000000  4601              MOV      r1,r0
;;;776    {
;;;777      /* Check the parameters */
;;;778      assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
;;;779      
;;;780      /* Return the data in the DR register */
;;;781      return SPIx->DR;
000002  8988              LDRH     r0,[r1,#0xc]
;;;782    }
000004  4770              BX       lr
;;;783    
                          ENDP


                          AREA ||i.SPI_I2S_SendData||, CODE, READONLY, ALIGN=1

                  SPI_I2S_SendData PROC
;;;790      */
;;;791    void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
000000  8181              STRH     r1,[r0,#0xc]
;;;792    {
;;;793      /* Check the parameters */
;;;794      assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
;;;795      
;;;796      /* Write in the DR register the data to be sent */
;;;797      SPIx->DR = Data;
;;;798    }
000002  4770              BX       lr
;;;799    
                          ENDP


                          AREA ||i.SPI_Init||, CODE, READONLY, ALIGN=1

                  SPI_Init PROC
;;;256      */
;;;257    void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
000000  b510              PUSH     {r4,lr}
;;;258    {
;;;259      uint16_t tmpreg = 0;
000002  2200              MOVS     r2,#0
;;;260      
;;;261      /* check the parameters */
;;;262      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;263      
;;;264      /* Check the SPI parameters */
;;;265      assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
;;;266      assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
;;;267      assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
;;;268      assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
;;;269      assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
;;;270      assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
;;;271      assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
;;;272      assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
;;;273      assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
;;;274    
;;;275    /*---------------------------- SPIx CR1 Configuration ------------------------*/
;;;276      /* Get the SPIx CR1 value */
;;;277      tmpreg = SPIx->CR1;
000004  8802              LDRH     r2,[r0,#0]
;;;278      /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
;;;279      tmpreg &= CR1_CLEAR_MASK;
000006  f4025241          AND      r2,r2,#0x3040
;;;280      /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
;;;281         master/salve mode, CPOL and CPHA */
;;;282      /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
;;;283      /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
;;;284      /* Set LSBFirst bit according to SPI_FirstBit value */
;;;285      /* Set BR bits according to SPI_BaudRatePrescaler value */
;;;286      /* Set CPOL bit according to SPI_CPOL value */
;;;287      /* Set CPHA bit according to SPI_CPHA value */
;;;288      tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
00000a  880b              LDRH     r3,[r1,#0]
00000c  884c              LDRH     r4,[r1,#2]
00000e  4323              ORRS     r3,r3,r4
000010  888c              LDRH     r4,[r1,#4]
000012  4323              ORRS     r3,r3,r4
000014  88cc              LDRH     r4,[r1,#6]
000016  4323              ORRS     r3,r3,r4
000018  890c              LDRH     r4,[r1,#8]
00001a  4323              ORRS     r3,r3,r4
00001c  894c              LDRH     r4,[r1,#0xa]
00001e  4323              ORRS     r3,r3,r4
000020  898c              LDRH     r4,[r1,#0xc]
000022  4323              ORRS     r3,r3,r4
000024  89cc              LDRH     r4,[r1,#0xe]
000026  4323              ORRS     r3,r3,r4
000028  431a              ORRS     r2,r2,r3
;;;289                      SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |  
;;;290                      SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |  
;;;291                      SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
;;;292      /* Write to SPIx CR1 */
;;;293      SPIx->CR1 = tmpreg;
00002a  8002              STRH     r2,[r0,#0]
;;;294    
;;;295      /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
;;;296      SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SMOD);
00002c  8b83              LDRH     r3,[r0,#0x1c]
00002e  f24f74ff          MOV      r4,#0xf7ff
000032  4023              ANDS     r3,r3,r4
000034  8383              STRH     r3,[r0,#0x1c]
;;;297    /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
;;;298      /* Write to SPIx CRCPOLY */
;;;299      SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
000036  8a0b              LDRH     r3,[r1,#0x10]
000038  8203              STRH     r3,[r0,#0x10]
;;;300    }
00003a  bd10              POP      {r4,pc}
;;;301    
                          ENDP


                          AREA ||i.SPI_NSSInternalSoftwareConfig||, CODE, READONLY, ALIGN=1

                  SPI_NSSInternalSoftwareConfig PROC
;;;607      */
;;;608    void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
000000  f5a1427e          SUB      r2,r1,#0xfe00
;;;609    {
;;;610      /* Check the parameters */
;;;611      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;612      assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
;;;613      if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
000004  3aff              SUBS     r2,r2,#0xff
000006  d004              BEQ      |L21.18|
;;;614      {
;;;615        /* Set NSS pin internally by software */
;;;616        SPIx->CR1 |= SPI_NSSInternalSoft_Set;
000008  8802              LDRH     r2,[r0,#0]
00000a  f4427280          ORR      r2,r2,#0x100
00000e  8002              STRH     r2,[r0,#0]
000010  e004              B        |L21.28|
                  |L21.18|
;;;617      }
;;;618      else
;;;619      {
;;;620        /* Reset NSS pin internally by software */
;;;621        SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
000012  8802              LDRH     r2,[r0,#0]
000014  f64f63ff          MOV      r3,#0xfeff
000018  401a              ANDS     r2,r2,r3
00001a  8002              STRH     r2,[r0,#0]
                  |L21.28|
;;;622      }
;;;623    }
00001c  4770              BX       lr
;;;624    
                          ENDP


                          AREA ||i.SPI_SSOutputCmd||, CODE, READONLY, ALIGN=1

                  SPI_SSOutputCmd PROC
;;;631      */
;;;632    void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
000000  b121              CBZ      r1,|L22.12|
;;;633    {
;;;634      /* Check the parameters */
;;;635      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;636      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;637      if (NewState != DISABLE)
;;;638      {
;;;639        /* Enable the selected SPI SS output */
;;;640        SPIx->CR2 |= (uint16_t)SPI_CR2_SSOE;
000002  8882              LDRH     r2,[r0,#4]
000004  f0420204          ORR      r2,r2,#4
000008  8082              STRH     r2,[r0,#4]
00000a  e004              B        |L22.22|
                  |L22.12|
;;;641      }
;;;642      else
;;;643      {
;;;644        /* Disable the selected SPI SS output */
;;;645        SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE);
00000c  8882              LDRH     r2,[r0,#4]
00000e  f64f73fb          MOV      r3,#0xfffb
000012  401a              ANDS     r2,r2,r3
000014  8082              STRH     r2,[r0,#4]
                  |L22.22|
;;;646      }
;;;647    }
000016  4770              BX       lr
;;;648    
                          ENDP


                          AREA ||i.SPI_StructInit||, CODE, READONLY, ALIGN=1

                  SPI_StructInit PROC
;;;452      */
;;;453    void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
000000  2100              MOVS     r1,#0
;;;454    {
;;;455    /*--------------- Reset SPI init structure parameters values -----------------*/
;;;456      /* Initialize the SPI_Direction member */
;;;457      SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
000002  8001              STRH     r1,[r0,#0]
;;;458      /* initialize the SPI_Mode member */
;;;459      SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
000004  8041              STRH     r1,[r0,#2]
;;;460      /* initialize the SPI_DataSize member */
;;;461      SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
000006  8081              STRH     r1,[r0,#4]
;;;462      /* Initialize the SPI_CPOL member */
;;;463      SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
000008  80c1              STRH     r1,[r0,#6]
;;;464      /* Initialize the SPI_CPHA member */
;;;465      SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
00000a  8101              STRH     r1,[r0,#8]
;;;466      /* Initialize the SPI_NSS member */
;;;467      SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
00000c  8141              STRH     r1,[r0,#0xa]
;;;468      /* Initialize the SPI_BaudRatePrescaler member */
;;;469      SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
00000e  8181              STRH     r1,[r0,#0xc]
;;;470      /* Initialize the SPI_FirstBit member */
;;;471      SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
000010  81c1              STRH     r1,[r0,#0xe]
;;;472      /* Initialize the SPI_CRCPolynomial member */
;;;473      SPI_InitStruct->SPI_CRCPolynomial = 7;
000012  2107              MOVS     r1,#7
000014  8201              STRH     r1,[r0,#0x10]
;;;474    }
000016  4770              BX       lr
;;;475    
                          ENDP


                          AREA ||i.SPI_TIModeCmd||, CODE, READONLY, ALIGN=1

                  SPI_TIModeCmd PROC
;;;662      */
;;;663    void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
000000  b121              CBZ      r1,|L24.12|
;;;664    {
;;;665      /* Check the parameters */
;;;666      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;667      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;668    
;;;669      if (NewState != DISABLE)
;;;670      {
;;;671        /* Enable the TI mode for the selected SPI peripheral */
;;;672        SPIx->CR2 |= SPI_CR2_FRF;
000002  8882              LDRH     r2,[r0,#4]
000004  f0420210          ORR      r2,r2,#0x10
000008  8082              STRH     r2,[r0,#4]
00000a  e004              B        |L24.22|
                  |L24.12|
;;;673      }
;;;674      else
;;;675      {
;;;676        /* Disable the TI mode for the selected SPI peripheral */
;;;677        SPIx->CR2 &= (uint16_t)~SPI_CR2_FRF;
00000c  8882              LDRH     r2,[r0,#4]
00000e  f64f73ef          MOV      r3,#0xffef
000012  401a              ANDS     r2,r2,r3
000014  8082              STRH     r2,[r0,#4]
                  |L24.22|
;;;678      }
;;;679    }
000016  4770              BX       lr
;;;680    
                          ENDP


                          AREA ||i.SPI_TransmitCRC||, CODE, READONLY, ALIGN=1

                  SPI_TransmitCRC PROC
;;;901      */
;;;902    void SPI_TransmitCRC(SPI_TypeDef* SPIx)
000000  8801              LDRH     r1,[r0,#0]
;;;903    {
;;;904      /* Check the parameters */
;;;905      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;906      
;;;907      /* Enable the selected SPI CRC transmission */
;;;908      SPIx->CR1 |= SPI_CR1_CRCNEXT;
000002  f4415180          ORR      r1,r1,#0x1000
000006  8001              STRH     r1,[r0,#0]
;;;909    }
000008  4770              BX       lr
;;;910    
                          ENDP


;*** Start embedded assembler ***

#line 1 "..\\..\\..\\Libraries\\STM32F4xx_StdPeriph_Driver\\src\\stm32f4xx_spi.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___15_stm32f4xx_spi_c_2b928927____REV16|
#line 114 "C:\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___15_stm32f4xx_spi_c_2b928927____REV16| PROC
#line 115

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___15_stm32f4xx_spi_c_2b928927____REVSH|
#line 128
|__asm___15_stm32f4xx_spi_c_2b928927____REVSH| PROC
#line 129

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
