; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\STM324xG_EVAL\stm32f4xx_sdio.o --asm_dir=.\STM324xG_EVAL\ --list_dir=.\STM324xG_EVAL\ --depend=.\STM324xG_EVAL\stm32f4xx_sdio.d --cpu=Cortex-M4.fp --apcs=interwork -O0 -Otime -I..\ -I..\..\..\Libraries\CMSIS\Device\ST\STM32F4xx\Include -I..\..\..\Libraries\STM32F4xx_StdPeriph_Driver\inc -I..\..\..\Utilities\STM32_EVAL\Common -I..\..\..\Utilities\STM32_EVAL\STM3240_41_G_EVAL -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\Inc\ST\STM32F4xx -D__MICROLIB -DUSE_STM324xG_EVAL -DSTM32F4XX -DUSE_STDPERIPH_DRIVER --omf_browse=.\STM324xG_EVAL\stm32f4xx_sdio.crf ..\..\..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_sdio.c]
                          THUMB

                          AREA ||i.SDIO_CEATAITCmd||, CODE, READONLY, ALIGN=2

                  SDIO_CEATAITCmd PROC
;;;715      */
;;;716    void SDIO_CEATAITCmd(FunctionalState NewState)
000000  2101              MOVS     r1,#1
;;;717    { 
;;;718      /* Check the parameters */
;;;719      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;720      
;;;721      *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1));
000002  4381              BICS     r1,r1,r0
000004  4a01              LDR      r2,|L1.12|
000006  6011              STR      r1,[r2,#0]
;;;722    }
000008  4770              BX       lr
;;;723    
                          ENDP

00000a  0000              DCW      0x0000
                  |L1.12|
                          DCD      0x422581b4

                          AREA ||i.SDIO_ClearFlag||, CODE, READONLY, ALIGN=2

                  SDIO_ClearFlag PROC
;;;904      */
;;;905    void SDIO_ClearFlag(uint32_t SDIO_FLAG)
000000  4901              LDR      r1,|L2.8|
;;;906    { 
;;;907      /* Check the parameters */
;;;908      assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG));
;;;909       
;;;910      SDIO->ICR = SDIO_FLAG;
000002  6008              STR      r0,[r1,#0]
;;;911    }
000004  4770              BX       lr
;;;912    
                          ENDP

000006  0000              DCW      0x0000
                  |L2.8|
                          DCD      0x40012c38

                          AREA ||i.SDIO_ClearITPendingBit||, CODE, READONLY, ALIGN=2

                  SDIO_ClearITPendingBit PROC
;;;979      */
;;;980    void SDIO_ClearITPendingBit(uint32_t SDIO_IT)
000000  4901              LDR      r1,|L3.8|
;;;981    { 
;;;982      /* Check the parameters */
;;;983      assert_param(IS_SDIO_CLEAR_IT(SDIO_IT));
;;;984       
;;;985      SDIO->ICR = SDIO_IT;
000002  6008              STR      r0,[r1,#0]
;;;986    }
000004  4770              BX       lr
;;;987    
                          ENDP

000006  0000              DCW      0x0000
                  |L3.8|
                          DCD      0x40012c38

                          AREA ||i.SDIO_ClockCmd||, CODE, READONLY, ALIGN=2

                  SDIO_ClockCmd PROC
;;;326      */
;;;327    void SDIO_ClockCmd(FunctionalState NewState)
000000  4901              LDR      r1,|L4.8|
;;;328    {
;;;329      /* Check the parameters */
;;;330      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;331      
;;;332      *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;333    }
000004  4770              BX       lr
;;;334    
                          ENDP

000006  0000              DCW      0x0000
                  |L4.8|
                          DCD      0x422580a0

                          AREA ||i.SDIO_CmdStructInit||, CODE, READONLY, ALIGN=1

                  SDIO_CmdStructInit PROC
;;;427      */
;;;428    void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct)
000000  2100              MOVS     r1,#0
;;;429    {
;;;430      /* SDIO_CmdInitStruct members default value */
;;;431      SDIO_CmdInitStruct->SDIO_Argument = 0x00;
000002  6001              STR      r1,[r0,#0]
;;;432      SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00;
000004  6041              STR      r1,[r0,#4]
;;;433      SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No;
000006  6081              STR      r1,[r0,#8]
;;;434      SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No;
000008  60c1              STR      r1,[r0,#0xc]
;;;435      SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable;
00000a  6101              STR      r1,[r0,#0x10]
;;;436    }
00000c  4770              BX       lr
;;;437    
                          ENDP


                          AREA ||i.SDIO_CommandCompletionCmd||, CODE, READONLY, ALIGN=2

                  SDIO_CommandCompletionCmd PROC
;;;701      */
;;;702    void SDIO_CommandCompletionCmd(FunctionalState NewState)
000000  4901              LDR      r1,|L6.8|
;;;703    { 
;;;704      /* Check the parameters */
;;;705      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;706      
;;;707      *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;708    }
000004  4770              BX       lr
;;;709    
                          ENDP

000006  0000              DCW      0x0000
                  |L6.8|
                          DCD      0x422581b0

                          AREA ||i.SDIO_DMACmd||, CODE, READONLY, ALIGN=2

                  SDIO_DMACmd PROC
;;;761      */
;;;762    void SDIO_DMACmd(FunctionalState NewState)
000000  4901              LDR      r1,|L7.8|
;;;763    {
;;;764      /* Check the parameters */
;;;765      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;766      
;;;767      *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;768    }
000004  4770              BX       lr
;;;769    
                          ENDP

000006  0000              DCW      0x0000
                  |L7.8|
                          DCD      0x4225858c

                          AREA ||i.SDIO_DataConfig||, CODE, READONLY, ALIGN=2

                  SDIO_DataConfig PROC
;;;495      */
;;;496    void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
000000  2100              MOVS     r1,#0
;;;497    {
;;;498      uint32_t tmpreg = 0;
;;;499      
;;;500      /* Check the parameters */
;;;501      assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength));
;;;502      assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize));
;;;503      assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir));
;;;504      assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode));
;;;505      assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM));
;;;506    
;;;507    /*---------------------------- SDIO DTIMER Configuration ---------------------*/
;;;508      /* Set the SDIO Data TimeOut value */
;;;509      SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut;
000002  4b0b              LDR      r3,|L8.48|
000004  6802              LDR      r2,[r0,#0]
000006  601a              STR      r2,[r3,#0]
;;;510    
;;;511    /*---------------------------- SDIO DLEN Configuration -----------------------*/
;;;512      /* Set the SDIO DataLength value */
;;;513      SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength;
000008  1d1b              ADDS     r3,r3,#4
00000a  6842              LDR      r2,[r0,#4]
00000c  601a              STR      r2,[r3,#0]
;;;514    
;;;515    /*---------------------------- SDIO DCTRL Configuration ----------------------*/  
;;;516      /* Get the SDIO DCTRL value */
;;;517      tmpreg = SDIO->DCTRL;
00000e  1d1a              ADDS     r2,r3,#4
000010  6811              LDR      r1,[r2,#0]
;;;518      /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */
;;;519      tmpreg &= DCTRL_CLEAR_MASK;
000012  f02101f7          BIC      r1,r1,#0xf7
;;;520      /* Set DEN bit according to SDIO_DPSM value */
;;;521      /* Set DTMODE bit according to SDIO_TransferMode value */
;;;522      /* Set DTDIR bit according to SDIO_TransferDir value */
;;;523      /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */
;;;524      tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir
000016  e9d02302          LDRD     r2,r3,[r0,#8]
00001a  431a              ORRS     r2,r2,r3
00001c  6903              LDR      r3,[r0,#0x10]
00001e  431a              ORRS     r2,r2,r3
000020  6943              LDR      r3,[r0,#0x14]
000022  431a              ORRS     r2,r2,r3
000024  4311              ORRS     r1,r1,r2
;;;525               | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM;
;;;526    
;;;527      /* Write to SDIO DCTRL */
;;;528      SDIO->DCTRL = tmpreg;
000026  4a02              LDR      r2,|L8.48|
000028  3208              ADDS     r2,r2,#8
00002a  6011              STR      r1,[r2,#0]
;;;529    }
00002c  4770              BX       lr
;;;530    
                          ENDP

00002e  0000              DCW      0x0000
                  |L8.48|
                          DCD      0x40012c24

                          AREA ||i.SDIO_DataStructInit||, CODE, READONLY, ALIGN=1

                  SDIO_DataStructInit PROC
;;;536      */
;;;537    void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
000000  f04f31ff          MOV      r1,#0xffffffff
;;;538    {
;;;539      /* SDIO_DataInitStruct members default value */
;;;540      SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF;
000004  6001              STR      r1,[r0,#0]
;;;541      SDIO_DataInitStruct->SDIO_DataLength = 0x00;
000006  2100              MOVS     r1,#0
000008  6041              STR      r1,[r0,#4]
;;;542      SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b;
00000a  6081              STR      r1,[r0,#8]
;;;543      SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard;
00000c  60c1              STR      r1,[r0,#0xc]
;;;544      SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block;  
00000e  6101              STR      r1,[r0,#0x10]
;;;545      SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable;
000010  6141              STR      r1,[r0,#0x14]
;;;546    }
000012  4770              BX       lr
;;;547    
                          ENDP


                          AREA ||i.SDIO_DeInit||, CODE, READONLY, ALIGN=1

                  SDIO_DeInit PROC
;;;258      */
;;;259    void SDIO_DeInit(void)
000000  b510              PUSH     {r4,lr}
;;;260    {
;;;261      RCC_APB2PeriphResetCmd(RCC_APB2Periph_SDIO, ENABLE);
000002  2101              MOVS     r1,#1
000004  02c8              LSLS     r0,r1,#11
000006  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;262      RCC_APB2PeriphResetCmd(RCC_APB2Periph_SDIO, DISABLE);
00000a  2100              MOVS     r1,#0
00000c  f44f6000          MOV      r0,#0x800
000010  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;263    }
000014  bd10              POP      {r4,pc}
;;;264    
                          ENDP


                          AREA ||i.SDIO_GetCommandResponse||, CODE, READONLY, ALIGN=2

                  SDIO_GetCommandResponse PROC
;;;442      */
;;;443    uint8_t SDIO_GetCommandResponse(void)
000000  4801              LDR      r0,|L11.8|
;;;444    {
;;;445      return (uint8_t)(SDIO->RESPCMD);
000002  6800              LDR      r0,[r0,#0]
000004  b2c0              UXTB     r0,r0
;;;446    }
000006  4770              BX       lr
;;;447    
                          ENDP

                  |L11.8|
                          DCD      0x40012c10

                          AREA ||i.SDIO_GetDataCounter||, CODE, READONLY, ALIGN=2

                  SDIO_GetDataCounter PROC
;;;552      */
;;;553    uint32_t SDIO_GetDataCounter(void)
000000  4801              LDR      r0,|L12.8|
;;;554    { 
;;;555      return SDIO->DCOUNT;
000002  6800              LDR      r0,[r0,#0]
;;;556    }
000004  4770              BX       lr
;;;557    
                          ENDP

000006  0000              DCW      0x0000
                  |L12.8|
                          DCD      0x40012c30

                          AREA ||i.SDIO_GetFIFOCount||, CODE, READONLY, ALIGN=2

                  SDIO_GetFIFOCount PROC
;;;582      */
;;;583    uint32_t SDIO_GetFIFOCount(void)
000000  4801              LDR      r0,|L13.8|
;;;584    { 
;;;585      return SDIO->FIFOCNT;
000002  6800              LDR      r0,[r0,#0]
;;;586    }
000004  4770              BX       lr
;;;587    
                          ENDP

000006  0000              DCW      0x0000
                  |L13.8|
                          DCD      0x40012c48

                          AREA ||i.SDIO_GetFlagStatus||, CODE, READONLY, ALIGN=2

                  SDIO_GetFlagStatus PROC
;;;867      */
;;;868    FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG)
000000  4601              MOV      r1,r0
;;;869    { 
;;;870      FlagStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;871      
;;;872      /* Check the parameters */
;;;873      assert_param(IS_SDIO_FLAG(SDIO_FLAG));
;;;874      
;;;875      if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET)
000004  4a03              LDR      r2,|L14.20|
000006  6812              LDR      r2,[r2,#0]
000008  420a              TST      r2,r1
00000a  d001              BEQ      |L14.16|
;;;876      {
;;;877        bitstatus = SET;
00000c  2001              MOVS     r0,#1
00000e  e000              B        |L14.18|
                  |L14.16|
;;;878      }
;;;879      else
;;;880      {
;;;881        bitstatus = RESET;
000010  2000              MOVS     r0,#0
                  |L14.18|
;;;882      }
;;;883      return bitstatus;
;;;884    }
000012  4770              BX       lr
;;;885    
                          ENDP

                  |L14.20|
                          DCD      0x40012c34

                          AREA ||i.SDIO_GetITStatus||, CODE, READONLY, ALIGN=2

                  SDIO_GetITStatus PROC
;;;943      */
;;;944    ITStatus SDIO_GetITStatus(uint32_t SDIO_IT)
000000  4601              MOV      r1,r0
;;;945    { 
;;;946      ITStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;947      
;;;948      /* Check the parameters */
;;;949      assert_param(IS_SDIO_GET_IT(SDIO_IT));
;;;950      if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET)  
000004  4a03              LDR      r2,|L15.20|
000006  6812              LDR      r2,[r2,#0]
000008  420a              TST      r2,r1
00000a  d001              BEQ      |L15.16|
;;;951      {
;;;952        bitstatus = SET;
00000c  2001              MOVS     r0,#1
00000e  e000              B        |L15.18|
                  |L15.16|
;;;953      }
;;;954      else
;;;955      {
;;;956        bitstatus = RESET;
000010  2000              MOVS     r0,#0
                  |L15.18|
;;;957      }
;;;958      return bitstatus;
;;;959    }
000012  4770              BX       lr
;;;960    
                          ENDP

                  |L15.20|
                          DCD      0x40012c34

                          AREA ||i.SDIO_GetPowerState||, CODE, READONLY, ALIGN=2

                  SDIO_GetPowerState PROC
;;;359      */
;;;360    uint32_t SDIO_GetPowerState(void)
000000  4802              LDR      r0,|L16.12|
;;;361    {
;;;362      return (SDIO->POWER & (~PWR_PWRCTRL_MASK));
000002  6800              LDR      r0,[r0,#0]
000004  f0000003          AND      r0,r0,#3
;;;363    }
000008  4770              BX       lr
;;;364    
                          ENDP

00000a  0000              DCW      0x0000
                  |L16.12|
                          DCD      0x40012c00

                          AREA ||i.SDIO_GetResponse||, CODE, READONLY, ALIGN=2

                  SDIO_GetResponse PROC
;;;457      */
;;;458    uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
000000  4601              MOV      r1,r0
;;;459    {
;;;460      __IO uint32_t tmp = 0;
000002  2200              MOVS     r2,#0
;;;461    
;;;462      /* Check the parameters */
;;;463      assert_param(IS_SDIO_RESP(SDIO_RESP));
;;;464    
;;;465      tmp = SDIO_RESP_ADDR + SDIO_RESP;
000004  4801              LDR      r0,|L17.12|
000006  180a              ADDS     r2,r1,r0
;;;466      
;;;467      return (*(__IO uint32_t *) tmp); 
000008  6810              LDR      r0,[r2,#0]
;;;468    }
00000a  4770              BX       lr
;;;469    
                          ENDP

                  |L17.12|
                          DCD      0x40012c14

                          AREA ||i.SDIO_ITConfig||, CODE, READONLY, ALIGN=2

                  SDIO_ITConfig PROC
;;;819      */
;;;820    void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState)
000000  b129              CBZ      r1,|L18.14|
;;;821    {
;;;822      /* Check the parameters */
;;;823      assert_param(IS_SDIO_IT(SDIO_IT));
;;;824      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;825      
;;;826      if (NewState != DISABLE)
;;;827      {
;;;828        /* Enable the SDIO interrupts */
;;;829        SDIO->MASK |= SDIO_IT;
000002  4a06              LDR      r2,|L18.28|
000004  6812              LDR      r2,[r2,#0]
000006  4302              ORRS     r2,r2,r0
000008  4b04              LDR      r3,|L18.28|
00000a  601a              STR      r2,[r3,#0]
00000c  e004              B        |L18.24|
                  |L18.14|
;;;830      }
;;;831      else
;;;832      {
;;;833        /* Disable the SDIO interrupts */
;;;834        SDIO->MASK &= ~SDIO_IT;
00000e  4a03              LDR      r2,|L18.28|
000010  6812              LDR      r2,[r2,#0]
000012  4382              BICS     r2,r2,r0
000014  4b01              LDR      r3,|L18.28|
000016  601a              STR      r2,[r3,#0]
                  |L18.24|
;;;835      } 
;;;836    }
000018  4770              BX       lr
;;;837    
                          ENDP

00001a  0000              DCW      0x0000
                  |L18.28|
                          DCD      0x40012c3c

                          AREA ||i.SDIO_Init||, CODE, READONLY, ALIGN=2

                  SDIO_Init PROC
;;;271      */
;;;272    void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct)
000000  2100              MOVS     r1,#0
;;;273    {
;;;274      uint32_t tmpreg = 0;
;;;275        
;;;276      /* Check the parameters */
;;;277      assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge));
;;;278      assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass));
;;;279      assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave));
;;;280      assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide));
;;;281      assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); 
;;;282       
;;;283    /*---------------------------- SDIO CLKCR Configuration ------------------------*/  
;;;284      /* Get the SDIO CLKCR value */
;;;285      tmpreg = SDIO->CLKCR;
000002  4a0a              LDR      r2,|L19.44|
000004  6811              LDR      r1,[r2,#0]
;;;286      
;;;287      /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */
;;;288      tmpreg &= CLKCR_CLEAR_MASK;
000006  f64762ff          MOV      r2,#0x7eff
00000a  4391              BICS     r1,r1,r2
;;;289      
;;;290      /* Set CLKDIV bits according to SDIO_ClockDiv value */
;;;291      /* Set PWRSAV bit according to SDIO_ClockPowerSave value */
;;;292      /* Set BYPASS bit according to SDIO_ClockBypass value */
;;;293      /* Set WIDBUS bits according to SDIO_BusWide value */
;;;294      /* Set NEGEDGE bits according to SDIO_ClockEdge value */
;;;295      /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */
;;;296      tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv  | SDIO_InitStruct->SDIO_ClockPowerSave |
00000c  7d02              LDRB     r2,[r0,#0x14]
00000e  6883              LDR      r3,[r0,#8]
000010  431a              ORRS     r2,r2,r3
000012  6843              LDR      r3,[r0,#4]
000014  431a              ORRS     r2,r2,r3
000016  68c3              LDR      r3,[r0,#0xc]
000018  431a              ORRS     r2,r2,r3
00001a  6803              LDR      r3,[r0,#0]
00001c  431a              ORRS     r2,r2,r3
00001e  6903              LDR      r3,[r0,#0x10]
000020  431a              ORRS     r2,r2,r3
000022  4311              ORRS     r1,r1,r2
;;;297                 SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide |
;;;298                 SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); 
;;;299      
;;;300      /* Write to SDIO CLKCR */
;;;301      SDIO->CLKCR = tmpreg;
000024  4a01              LDR      r2,|L19.44|
000026  6011              STR      r1,[r2,#0]
;;;302    }
000028  4770              BX       lr
;;;303    
                          ENDP

00002a  0000              DCW      0x0000
                  |L19.44|
                          DCD      0x40012c04

                          AREA ||i.SDIO_ReadData||, CODE, READONLY, ALIGN=2

                  SDIO_ReadData PROC
;;;562      */
;;;563    uint32_t SDIO_ReadData(void)
000000  4801              LDR      r0,|L20.8|
;;;564    { 
;;;565      return SDIO->FIFO;
000002  6800              LDR      r0,[r0,#0]
;;;566    }
000004  4770              BX       lr
;;;567    
                          ENDP

000006  0000              DCW      0x0000
                  |L20.8|
                          DCD      0x40012c80

                          AREA ||i.SDIO_SendCEATACmd||, CODE, READONLY, ALIGN=2

                  SDIO_SendCEATACmd PROC
;;;729      */
;;;730    void SDIO_SendCEATACmd(FunctionalState NewState)
000000  4901              LDR      r1,|L21.8|
;;;731    { 
;;;732      /* Check the parameters */
;;;733      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;734      
;;;735      *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;736    }
000004  4770              BX       lr
;;;737    
                          ENDP

000006  0000              DCW      0x0000
                  |L21.8|
                          DCD      0x422581b8

                          AREA ||i.SDIO_SendCommand||, CODE, READONLY, ALIGN=2

                  SDIO_SendCommand PROC
;;;391      */
;;;392    void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
000000  2100              MOVS     r1,#0
;;;393    {
;;;394      uint32_t tmpreg = 0;
;;;395      
;;;396      /* Check the parameters */
;;;397      assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex));
;;;398      assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response));
;;;399      assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait));
;;;400      assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM));
;;;401      
;;;402    /*---------------------------- SDIO ARG Configuration ------------------------*/
;;;403      /* Set the SDIO Argument value */
;;;404      SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument;
000002  4b09              LDR      r3,|L22.40|
000004  6802              LDR      r2,[r0,#0]
000006  601a              STR      r2,[r3,#0]
;;;405      
;;;406    /*---------------------------- SDIO CMD Configuration ------------------------*/  
;;;407      /* Get the SDIO CMD value */
;;;408      tmpreg = SDIO->CMD;
000008  1d1a              ADDS     r2,r3,#4
00000a  6811              LDR      r1,[r2,#0]
;;;409      /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */
;;;410      tmpreg &= CMD_CLEAR_MASK;
00000c  f36f010a          BFC      r1,#0,#11
;;;411      /* Set CMDINDEX bits according to SDIO_CmdIndex value */
;;;412      /* Set WAITRESP bits according to SDIO_Response value */
;;;413      /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */
;;;414      /* Set CPSMEN bits according to SDIO_CPSM value */
;;;415      tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response
000010  e9d02301          LDRD     r2,r3,[r0,#4]
000014  431a              ORRS     r2,r2,r3
000016  68c3              LDR      r3,[r0,#0xc]
000018  431a              ORRS     r2,r2,r3
00001a  6903              LDR      r3,[r0,#0x10]
00001c  431a              ORRS     r2,r2,r3
00001e  4311              ORRS     r1,r1,r2
;;;416               | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM;
;;;417      
;;;418      /* Write to SDIO CMD */
;;;419      SDIO->CMD = tmpreg;
000020  4a01              LDR      r2,|L22.40|
000022  1d12              ADDS     r2,r2,#4
000024  6011              STR      r1,[r2,#0]
;;;420    }
000026  4770              BX       lr
;;;421    
                          ENDP

                  |L22.40|
                          DCD      0x40012c08

                          AREA ||i.SDIO_SendSDIOSuspendCmd||, CODE, READONLY, ALIGN=2

                  SDIO_SendSDIOSuspendCmd PROC
;;;669      */
;;;670    void SDIO_SendSDIOSuspendCmd(FunctionalState NewState)
000000  4901              LDR      r1,|L23.8|
;;;671    { 
;;;672      /* Check the parameters */
;;;673      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;674      
;;;675      *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;676    }
000004  4770              BX       lr
;;;677    
                          ENDP

000006  0000              DCW      0x0000
                  |L23.8|
                          DCD      0x422581ac

                          AREA ||i.SDIO_SetPowerState||, CODE, READONLY, ALIGN=2

                  SDIO_SetPowerState PROC
;;;342      */
;;;343    void SDIO_SetPowerState(uint32_t SDIO_PowerState)
000000  4901              LDR      r1,|L24.8|
;;;344    {
;;;345      /* Check the parameters */
;;;346      assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState));
;;;347      
;;;348      SDIO->POWER = SDIO_PowerState;
000002  6008              STR      r0,[r1,#0]
;;;349    }
000004  4770              BX       lr
;;;350    
                          ENDP

000006  0000              DCW      0x0000
                  |L24.8|
                          DCD      0x40012c00

                          AREA ||i.SDIO_SetSDIOOperation||, CODE, READONLY, ALIGN=2

                  SDIO_SetSDIOOperation PROC
;;;655      */
;;;656    void SDIO_SetSDIOOperation(FunctionalState NewState)
000000  4901              LDR      r1,|L25.8|
;;;657    { 
;;;658      /* Check the parameters */
;;;659      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;660      
;;;661      *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;662    }
000004  4770              BX       lr
;;;663    
                          ENDP

000006  0000              DCW      0x0000
                  |L25.8|
                          DCD      0x422585ac

                          AREA ||i.SDIO_SetSDIOReadWaitMode||, CODE, READONLY, ALIGN=2

                  SDIO_SetSDIOReadWaitMode PROC
;;;641      */
;;;642    void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
000000  4901              LDR      r1,|L26.8|
;;;643    {
;;;644      /* Check the parameters */
;;;645      assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
;;;646      
;;;647      *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode;
000002  6008              STR      r0,[r1,#0]
;;;648    }
000004  4770              BX       lr
;;;649    
                          ENDP

000006  0000              DCW      0x0000
                  |L26.8|
                          DCD      0x422585a8

                          AREA ||i.SDIO_StartSDIOReadWait||, CODE, READONLY, ALIGN=2

                  SDIO_StartSDIOReadWait PROC
;;;611      */
;;;612    void SDIO_StartSDIOReadWait(FunctionalState NewState)
000000  4901              LDR      r1,|L27.8|
;;;613    { 
;;;614      /* Check the parameters */
;;;615      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;616      
;;;617      *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState;
000002  6008              STR      r0,[r1,#0]
;;;618    }
000004  4770              BX       lr
;;;619    
                          ENDP

000006  0000              DCW      0x0000
                  |L27.8|
                          DCD      0x422585a0

                          AREA ||i.SDIO_StopSDIOReadWait||, CODE, READONLY, ALIGN=2

                  SDIO_StopSDIOReadWait PROC
;;;625      */
;;;626    void SDIO_StopSDIOReadWait(FunctionalState NewState)
000000  4901              LDR      r1,|L28.8|
;;;627    { 
;;;628      /* Check the parameters */
;;;629      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;630      
;;;631      *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState;
000002  6008              STR      r0,[r1,#0]
;;;632    }
000004  4770              BX       lr
;;;633    
                          ENDP

000006  0000              DCW      0x0000
                  |L28.8|
                          DCD      0x422585a4

                          AREA ||i.SDIO_StructInit||, CODE, READONLY, ALIGN=1

                  SDIO_StructInit PROC
;;;309      */
;;;310    void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct)
000000  2100              MOVS     r1,#0
;;;311    {
;;;312      /* SDIO_InitStruct members default value */
;;;313      SDIO_InitStruct->SDIO_ClockDiv = 0x00;
000002  7501              STRB     r1,[r0,#0x14]
;;;314      SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising;
000004  6001              STR      r1,[r0,#0]
;;;315      SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable;
000006  6041              STR      r1,[r0,#4]
;;;316      SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
000008  6081              STR      r1,[r0,#8]
;;;317      SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b;
00000a  60c1              STR      r1,[r0,#0xc]
;;;318      SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
00000c  6101              STR      r1,[r0,#0x10]
;;;319    }
00000e  4770              BX       lr
;;;320    
                          ENDP


                          AREA ||i.SDIO_WriteData||, CODE, READONLY, ALIGN=2

                  SDIO_WriteData PROC
;;;572      */
;;;573    void SDIO_WriteData(uint32_t Data)
000000  4901              LDR      r1,|L30.8|
;;;574    { 
;;;575      SDIO->FIFO = Data;
000002  6008              STR      r0,[r1,#0]
;;;576    }
000004  4770              BX       lr
;;;577    
                          ENDP

000006  0000              DCW      0x0000
                  |L30.8|
                          DCD      0x40012c80

;*** Start embedded assembler ***

#line 1 "..\\..\\..\\Libraries\\STM32F4xx_StdPeriph_Driver\\src\\stm32f4xx_sdio.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___16_stm32f4xx_sdio_c_c8827541____REV16|
#line 114 "C:\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___16_stm32f4xx_sdio_c_c8827541____REV16| PROC
#line 115

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___16_stm32f4xx_sdio_c_c8827541____REVSH|
#line 128
|__asm___16_stm32f4xx_sdio_c_c8827541____REVSH| PROC
#line 129

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
