; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\STM324xG_EVAL\stm32f4xx_can.o --asm_dir=.\STM324xG_EVAL\ --list_dir=.\STM324xG_EVAL\ --depend=.\STM324xG_EVAL\stm32f4xx_can.d --cpu=Cortex-M4.fp --apcs=interwork -O0 -Otime -I..\ -I..\..\..\Libraries\CMSIS\Device\ST\STM32F4xx\Include -I..\..\..\Libraries\STM32F4xx_StdPeriph_Driver\inc -I..\..\..\Utilities\STM32_EVAL\Common -I..\..\..\Utilities\STM32_EVAL\STM3240_41_G_EVAL -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\Inc\ST\STM32F4xx -D__MICROLIB -DUSE_STM324xG_EVAL -DSTM32F4XX -DUSE_STDPERIPH_DRIVER --omf_browse=.\STM324xG_EVAL\stm32f4xx_can.crf ..\..\..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_can.c]
                          THUMB

                          AREA ||i.CAN_CancelTransmit||, CODE, READONLY, ALIGN=1

                  CAN_CancelTransmit PROC
;;;697      */
;;;698    void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox)
000000  b121              CBZ      r1,|L1.12|
;;;699    {
;;;700      /* Check the parameters */
;;;701      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;702      assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox));
;;;703      /* abort transmission */
;;;704      switch (Mailbox)
000002  2901              CMP      r1,#1
000004  d007              BEQ      |L1.22|
000006  2902              CMP      r1,#2
000008  d10f              BNE      |L1.42|
00000a  e009              B        |L1.32|
                  |L1.12|
;;;705      {
;;;706        case (CAN_TXMAILBOX_0): CANx->TSR |= CAN_TSR_ABRQ0;
00000c  6882              LDR      r2,[r0,#8]
00000e  f0420280          ORR      r2,r2,#0x80
000012  6082              STR      r2,[r0,#8]
;;;707          break;
000014  e00a              B        |L1.44|
                  |L1.22|
;;;708        case (CAN_TXMAILBOX_1): CANx->TSR |= CAN_TSR_ABRQ1;
000016  6882              LDR      r2,[r0,#8]
000018  f4424200          ORR      r2,r2,#0x8000
00001c  6082              STR      r2,[r0,#8]
;;;709          break;
00001e  e005              B        |L1.44|
                  |L1.32|
;;;710        case (CAN_TXMAILBOX_2): CANx->TSR |= CAN_TSR_ABRQ2;
000020  6882              LDR      r2,[r0,#8]
000022  f4420200          ORR      r2,r2,#0x800000
000026  6082              STR      r2,[r0,#8]
;;;711          break;
000028  e000              B        |L1.44|
                  |L1.42|
;;;712        default:
;;;713          break;
00002a  bf00              NOP      
                  |L1.44|
00002c  bf00              NOP                            ;707
;;;714      }
;;;715    }
00002e  4770              BX       lr
;;;716    /**
                          ENDP


                          AREA ||i.CAN_ClearFlag||, CODE, READONLY, ALIGN=2

                  CAN_ClearFlag PROC
;;;1426     */
;;;1427   void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
000000  2200              MOVS     r2,#0
;;;1428   {
;;;1429     uint32_t flagtmp=0;
;;;1430     /* Check the parameters */
;;;1431     assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;1432     assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG));
;;;1433     
;;;1434     if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */
000002  4b0c              LDR      r3,|L2.52|
000004  4299              CMP      r1,r3
000006  d102              BNE      |L2.14|
;;;1435     {
;;;1436       /* Clear the selected CAN flags */
;;;1437       CANx->ESR = (uint32_t)RESET;
000008  2300              MOVS     r3,#0
00000a  6183              STR      r3,[r0,#0x18]
00000c  e011              B        |L2.50|
                  |L2.14|
;;;1438     }
;;;1439     else /* MSR or TSR or RF0R or RF1R */
;;;1440     {
;;;1441       flagtmp = CAN_FLAG & 0x000FFFFF;
00000e  f3c10213          UBFX     r2,r1,#0,#20
;;;1442   
;;;1443       if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET)
000012  f0117f00          TST      r1,#0x2000000
000016  d001              BEQ      |L2.28|
;;;1444       {
;;;1445         /* Receive Flags */
;;;1446         CANx->RF0R = (uint32_t)(flagtmp);
000018  60c2              STR      r2,[r0,#0xc]
00001a  e00a              B        |L2.50|
                  |L2.28|
;;;1447       }
;;;1448       else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET)
00001c  f0116f80          TST      r1,#0x4000000
000020  d001              BEQ      |L2.38|
;;;1449       {
;;;1450         /* Receive Flags */
;;;1451         CANx->RF1R = (uint32_t)(flagtmp);
000022  6102              STR      r2,[r0,#0x10]
000024  e005              B        |L2.50|
                  |L2.38|
;;;1452       }
;;;1453       else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET)
000026  f0116f00          TST      r1,#0x8000000
00002a  d001              BEQ      |L2.48|
;;;1454       {
;;;1455         /* Transmit Flags */
;;;1456         CANx->TSR = (uint32_t)(flagtmp);
00002c  6082              STR      r2,[r0,#8]
00002e  e000              B        |L2.50|
                  |L2.48|
;;;1457       }
;;;1458       else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */
;;;1459       {
;;;1460         /* Operating mode Flags */
;;;1461         CANx->MSR = (uint32_t)(flagtmp);
000030  6042              STR      r2,[r0,#4]
                  |L2.50|
;;;1462       }
;;;1463     }
;;;1464   }
000032  4770              BX       lr
;;;1465   
                          ENDP

                  |L2.52|
                          DCD      0x30f00070

                          AREA ||i.CAN_ClearITPendingBit||, CODE, READONLY, ALIGN=2

                  CAN_ClearITPendingBit PROC
;;;1590     */
;;;1591   void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT)
000000  f5b17f00          CMP      r1,#0x200
;;;1592   {
;;;1593     /* Check the parameters */
;;;1594     assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;1595     assert_param(IS_CAN_CLEAR_IT(CAN_IT));
;;;1596   
;;;1597     switch (CAN_IT)
000004  d03a              BEQ      |L3.124|
000006  dc0f              BGT      |L3.40|
000008  2920              CMP      r1,#0x20
00000a  d028              BEQ      |L3.94|
00000c  dc06              BGT      |L3.28|
00000e  2901              CMP      r1,#1
000010  d01c              BEQ      |L3.76|
000012  2904              CMP      r1,#4
000014  d01d              BEQ      |L3.82|
000016  2908              CMP      r1,#8
000018  d140              BNE      |L3.156|
00001a  e01d              B        |L3.88|
                  |L3.28|
00001c  2940              CMP      r1,#0x40
00001e  d021              BEQ      |L3.100|
000020  f5b17f80          CMP      r1,#0x100
000024  d13a              BNE      |L3.156|
000026  e026              B        |L3.118|
                  |L3.40|
000028  f5b14f00          CMP      r1,#0x8000
00002c  d031              BEQ      |L3.146|
00002e  dc06              BGT      |L3.62|
000030  f5b16f80          CMP      r1,#0x400
000034  d025              BEQ      |L3.130|
000036  f5b16f00          CMP      r1,#0x800
00003a  d12f              BNE      |L3.156|
00003c  e024              B        |L3.136|
                  |L3.62|
00003e  f5b13f80          CMP      r1,#0x10000
000042  d012              BEQ      |L3.106|
000044  f5b13f00          CMP      r1,#0x20000
000048  d128              BNE      |L3.156|
00004a  e011              B        |L3.112|
                  |L3.76|
;;;1598     {
;;;1599       case CAN_IT_TME:
;;;1600         /* Clear CAN_TSR_RQCPx (rc_w1)*/
;;;1601         CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2;  
00004c  4a15              LDR      r2,|L3.164|
00004e  6082              STR      r2,[r0,#8]
;;;1602         break;
000050  e025              B        |L3.158|
                  |L3.82|
;;;1603       case CAN_IT_FF0:
;;;1604         /* Clear CAN_RF0R_FULL0 (rc_w1)*/
;;;1605         CANx->RF0R = CAN_RF0R_FULL0; 
000052  2208              MOVS     r2,#8
000054  60c2              STR      r2,[r0,#0xc]
;;;1606         break;
000056  e022              B        |L3.158|
                  |L3.88|
;;;1607       case CAN_IT_FOV0:
;;;1608         /* Clear CAN_RF0R_FOVR0 (rc_w1)*/
;;;1609         CANx->RF0R = CAN_RF0R_FOVR0; 
000058  2210              MOVS     r2,#0x10
00005a  60c2              STR      r2,[r0,#0xc]
;;;1610         break;
00005c  e01f              B        |L3.158|
                  |L3.94|
;;;1611       case CAN_IT_FF1:
;;;1612         /* Clear CAN_RF1R_FULL1 (rc_w1)*/
;;;1613         CANx->RF1R = CAN_RF1R_FULL1;  
00005e  2208              MOVS     r2,#8
000060  6102              STR      r2,[r0,#0x10]
;;;1614         break;
000062  e01c              B        |L3.158|
                  |L3.100|
;;;1615       case CAN_IT_FOV1:
;;;1616         /* Clear CAN_RF1R_FOVR1 (rc_w1)*/
;;;1617         CANx->RF1R = CAN_RF1R_FOVR1; 
000064  2210              MOVS     r2,#0x10
000066  6102              STR      r2,[r0,#0x10]
;;;1618         break;
000068  e019              B        |L3.158|
                  |L3.106|
;;;1619       case CAN_IT_WKU:
;;;1620         /* Clear CAN_MSR_WKUI (rc_w1)*/
;;;1621         CANx->MSR = CAN_MSR_WKUI;  
00006a  2208              MOVS     r2,#8
00006c  6042              STR      r2,[r0,#4]
;;;1622         break;
00006e  e016              B        |L3.158|
                  |L3.112|
;;;1623       case CAN_IT_SLK:
;;;1624         /* Clear CAN_MSR_SLAKI (rc_w1)*/ 
;;;1625         CANx->MSR = CAN_MSR_SLAKI;   
000070  2210              MOVS     r2,#0x10
000072  6042              STR      r2,[r0,#4]
;;;1626         break;
000074  e013              B        |L3.158|
                  |L3.118|
;;;1627       case CAN_IT_EWG:
;;;1628         /* Clear CAN_MSR_ERRI (rc_w1) */
;;;1629         CANx->MSR = CAN_MSR_ERRI;
000076  2204              MOVS     r2,#4
000078  6042              STR      r2,[r0,#4]
;;;1630          /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/ 
;;;1631         break;
00007a  e010              B        |L3.158|
                  |L3.124|
;;;1632       case CAN_IT_EPV:
;;;1633         /* Clear CAN_MSR_ERRI (rc_w1) */
;;;1634         CANx->MSR = CAN_MSR_ERRI; 
00007c  2204              MOVS     r2,#4
00007e  6042              STR      r2,[r0,#4]
;;;1635          /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
;;;1636         break;
000080  e00d              B        |L3.158|
                  |L3.130|
;;;1637       case CAN_IT_BOF:
;;;1638         /* Clear CAN_MSR_ERRI (rc_w1) */ 
;;;1639         CANx->MSR = CAN_MSR_ERRI; 
000082  2204              MOVS     r2,#4
000084  6042              STR      r2,[r0,#4]
;;;1640          /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
;;;1641          break;
000086  e00a              B        |L3.158|
                  |L3.136|
;;;1642       case CAN_IT_LEC:
;;;1643         /*  Clear LEC bits */
;;;1644         CANx->ESR = RESET; 
000088  2200              MOVS     r2,#0
00008a  6182              STR      r2,[r0,#0x18]
;;;1645         /* Clear CAN_MSR_ERRI (rc_w1) */
;;;1646         CANx->MSR = CAN_MSR_ERRI; 
00008c  2204              MOVS     r2,#4
00008e  6042              STR      r2,[r0,#4]
;;;1647         break;
000090  e005              B        |L3.158|
                  |L3.146|
;;;1648       case CAN_IT_ERR:
;;;1649         /*Clear LEC bits */
;;;1650         CANx->ESR = RESET; 
000092  2200              MOVS     r2,#0
000094  6182              STR      r2,[r0,#0x18]
;;;1651         /* Clear CAN_MSR_ERRI (rc_w1) */
;;;1652         CANx->MSR = CAN_MSR_ERRI; 
000096  2204              MOVS     r2,#4
000098  6042              STR      r2,[r0,#4]
;;;1653          /* @note BOFF, EPVF and EWGF Flags are cleared by hardware depending on the CAN Bus status*/
;;;1654          break;
00009a  e000              B        |L3.158|
                  |L3.156|
;;;1655       default:
;;;1656          break;
00009c  bf00              NOP      
                  |L3.158|
00009e  bf00              NOP                            ;1602
;;;1657      }
;;;1658   }
0000a0  4770              BX       lr
;;;1659    /**
                          ENDP

0000a2  0000              DCW      0x0000
                  |L3.164|
                          DCD      0x00010101

                          AREA ||i.CAN_DBGFreeze||, CODE, READONLY, ALIGN=1

                  CAN_DBGFreeze PROC
;;;487      */
;;;488    void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState)
000000  b121              CBZ      r1,|L4.12|
;;;489    {
;;;490      /* Check the parameters */
;;;491      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;492      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;493      
;;;494      if (NewState != DISABLE)
;;;495      {
;;;496        /* Enable Debug Freeze  */
;;;497        CANx->MCR |= MCR_DBF;
000002  6802              LDR      r2,[r0,#0]
000004  f4423280          ORR      r2,r2,#0x10000
000008  6002              STR      r2,[r0,#0]
00000a  e003              B        |L4.20|
                  |L4.12|
;;;498      }
;;;499      else
;;;500      {
;;;501        /* Disable Debug Freeze */
;;;502        CANx->MCR &= ~MCR_DBF;
00000c  6802              LDR      r2,[r0,#0]
00000e  f4223280          BIC      r2,r2,#0x10000
000012  6002              STR      r2,[r0,#0]
                  |L4.20|
;;;503      }
;;;504    }
000014  4770              BX       lr
;;;505    
                          ENDP


                          AREA ||i.CAN_DeInit||, CODE, READONLY, ALIGN=2

                  CAN_DeInit PROC
;;;161      */
;;;162    void CAN_DeInit(CAN_TypeDef* CANx)
000000  b510              PUSH     {r4,lr}
;;;163    {
000002  4604              MOV      r4,r0
;;;164      /* Check the parameters */
;;;165      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;166     
;;;167      if (CANx == CAN1)
000004  480b              LDR      r0,|L5.52|
000006  4284              CMP      r4,r0
000008  d109              BNE      |L5.30|
;;;168      {
;;;169        /* Enable CAN1 reset state */
;;;170        RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE);
00000a  2101              MOVS     r1,#1
00000c  0648              LSLS     r0,r1,#25
00000e  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;171        /* Release CAN1 from reset state */
;;;172        RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE);
000012  2100              MOVS     r1,#0
000014  f04f7000          MOV      r0,#0x2000000
000018  f7fffffe          BL       RCC_APB1PeriphResetCmd
00001c  e008              B        |L5.48|
                  |L5.30|
;;;173      }
;;;174      else
;;;175      {  
;;;176        /* Enable CAN2 reset state */
;;;177        RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE);
00001e  2101              MOVS     r1,#1
000020  0688              LSLS     r0,r1,#26
000022  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;178        /* Release CAN2 from reset state */
;;;179        RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE);
000026  2100              MOVS     r1,#0
000028  f04f6080          MOV      r0,#0x4000000
00002c  f7fffffe          BL       RCC_APB1PeriphResetCmd
                  |L5.48|
;;;180      }
;;;181    }
000030  bd10              POP      {r4,pc}
;;;182    
                          ENDP

000032  0000              DCW      0x0000
                  |L5.52|
                          DCD      0x40006400

                          AREA ||i.CAN_FIFORelease||, CODE, READONLY, ALIGN=1

                  CAN_FIFORelease PROC
;;;793      */
;;;794    void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber)
000000  b921              CBNZ     r1,|L6.12|
;;;795    {
;;;796      /* Check the parameters */
;;;797      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;798      assert_param(IS_CAN_FIFO(FIFONumber));
;;;799      /* Release FIFO0 */
;;;800      if (FIFONumber == CAN_FIFO0)
;;;801      {
;;;802        CANx->RF0R |= CAN_RF0R_RFOM0;
000002  68c2              LDR      r2,[r0,#0xc]
000004  f0420220          ORR      r2,r2,#0x20
000008  60c2              STR      r2,[r0,#0xc]
00000a  e003              B        |L6.20|
                  |L6.12|
;;;803      }
;;;804      /* Release FIFO1 */
;;;805      else /* FIFONumber == CAN_FIFO1 */
;;;806      {
;;;807        CANx->RF1R |= CAN_RF1R_RFOM1;
00000c  6902              LDR      r2,[r0,#0x10]
00000e  f0420220          ORR      r2,r2,#0x20
000012  6102              STR      r2,[r0,#0x10]
                  |L6.20|
;;;808      }
;;;809    }
000014  4770              BX       lr
;;;810    
                          ENDP


                          AREA ||i.CAN_FilterInit||, CODE, READONLY, ALIGN=2

                  CAN_FilterInit PROC
;;;328      */
;;;329    void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct)
000000  b510              PUSH     {r4,lr}
;;;330    {
;;;331      uint32_t filter_number_bit_pos = 0;
000002  2100              MOVS     r1,#0
;;;332      /* Check the parameters */
;;;333      assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber));
;;;334      assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode));
;;;335      assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale));
;;;336      assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment));
;;;337      assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation));
;;;338    
;;;339      filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber;
000004  7a83              LDRB     r3,[r0,#0xa]
000006  2201              MOVS     r2,#1
000008  fa02f103          LSL      r1,r2,r3
;;;340    
;;;341      /* Initialisation mode for the filter */
;;;342      CAN1->FMR |= FMR_FINIT;
00000c  4a3d              LDR      r2,|L7.260|
00000e  6812              LDR      r2,[r2,#0]
000010  f0420201          ORR      r2,r2,#1
000014  4b3b              LDR      r3,|L7.260|
000016  601a              STR      r2,[r3,#0]
;;;343    
;;;344      /* Filter Deactivation */
;;;345      CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos;
000018  4a3a              LDR      r2,|L7.260|
00001a  321c              ADDS     r2,r2,#0x1c
00001c  6812              LDR      r2,[r2,#0]
00001e  438a              BICS     r2,r2,r1
000020  4b38              LDR      r3,|L7.260|
000022  331c              ADDS     r3,r3,#0x1c
000024  601a              STR      r2,[r3,#0]
;;;346    
;;;347      /* Filter Scale */
;;;348      if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
000026  7b02              LDRB     r2,[r0,#0xc]
000028  b9ca              CBNZ     r2,|L7.94|
;;;349      {
;;;350        /* 16-bit scale for the filter */
;;;351        CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos;
00002a  4a36              LDR      r2,|L7.260|
00002c  320c              ADDS     r2,r2,#0xc
00002e  6812              LDR      r2,[r2,#0]
000030  438a              BICS     r2,r2,r1
000032  4b34              LDR      r3,|L7.260|
000034  330c              ADDS     r3,r3,#0xc
000036  601a              STR      r2,[r3,#0]
;;;352    
;;;353        /* First 16-bit identifier and First 16-bit mask */
;;;354        /* Or First 16-bit identifier and Second 16-bit identifier */
;;;355        CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = 
000038  8842              LDRH     r2,[r0,#2]
00003a  88c3              LDRH     r3,[r0,#6]
00003c  ea424303          ORR      r3,r2,r3,LSL #16
000040  4a30              LDR      r2,|L7.260|
000042  3240              ADDS     r2,r2,#0x40
000044  7a84              LDRB     r4,[r0,#0xa]
000046  f8423034          STR      r3,[r2,r4,LSL #3]
;;;356           ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
;;;357            (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
;;;358    
;;;359        /* Second 16-bit identifier and Second 16-bit mask */
;;;360        /* Or Third 16-bit identifier and Fourth 16-bit identifier */
;;;361        CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = 
00004a  8802              LDRH     r2,[r0,#0]
00004c  8883              LDRH     r3,[r0,#4]
00004e  ea424303          ORR      r3,r2,r3,LSL #16
000052  4a2c              LDR      r2,|L7.260|
000054  3240              ADDS     r2,r2,#0x40
000056  7a84              LDRB     r4,[r0,#0xa]
000058  eb0202c4          ADD      r2,r2,r4,LSL #3
00005c  6053              STR      r3,[r2,#4]
                  |L7.94|
;;;362           ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
;;;363            (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh);
;;;364      }
;;;365    
;;;366      if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
00005e  7b02              LDRB     r2,[r0,#0xc]
000060  2a01              CMP      r2,#1
000062  d119              BNE      |L7.152|
;;;367      {
;;;368        /* 32-bit scale for the filter */
;;;369        CAN1->FS1R |= filter_number_bit_pos;
000064  4a27              LDR      r2,|L7.260|
000066  320c              ADDS     r2,r2,#0xc
000068  6812              LDR      r2,[r2,#0]
00006a  430a              ORRS     r2,r2,r1
00006c  4b25              LDR      r3,|L7.260|
00006e  330c              ADDS     r3,r3,#0xc
000070  601a              STR      r2,[r3,#0]
;;;370        /* 32-bit identifier or First 32-bit identifier */
;;;371        CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = 
000072  8842              LDRH     r2,[r0,#2]
000074  8803              LDRH     r3,[r0,#0]
000076  ea424303          ORR      r3,r2,r3,LSL #16
00007a  4a22              LDR      r2,|L7.260|
00007c  3240              ADDS     r2,r2,#0x40
00007e  7a84              LDRB     r4,[r0,#0xa]
000080  f8423034          STR      r3,[r2,r4,LSL #3]
;;;372           ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
;;;373            (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
;;;374        /* 32-bit mask or Second 32-bit identifier */
;;;375        CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = 
000084  88c2              LDRH     r2,[r0,#6]
000086  8883              LDRH     r3,[r0,#4]
000088  ea424303          ORR      r3,r2,r3,LSL #16
00008c  4a1d              LDR      r2,|L7.260|
00008e  3240              ADDS     r2,r2,#0x40
000090  7a84              LDRB     r4,[r0,#0xa]
000092  eb0202c4          ADD      r2,r2,r4,LSL #3
000096  6053              STR      r3,[r2,#4]
                  |L7.152|
;;;376           ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
;;;377            (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow);
;;;378      }
;;;379    
;;;380      /* Filter Mode */
;;;381      if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
000098  7ac2              LDRB     r2,[r0,#0xb]
00009a  b93a              CBNZ     r2,|L7.172|
;;;382      {
;;;383        /*Id/Mask mode for the filter*/
;;;384        CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos;
00009c  4a19              LDR      r2,|L7.260|
00009e  1d12              ADDS     r2,r2,#4
0000a0  6812              LDR      r2,[r2,#0]
0000a2  438a              BICS     r2,r2,r1
0000a4  4b17              LDR      r3,|L7.260|
0000a6  1d1b              ADDS     r3,r3,#4
0000a8  601a              STR      r2,[r3,#0]
0000aa  e006              B        |L7.186|
                  |L7.172|
;;;385      }
;;;386      else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
;;;387      {
;;;388        /*Identifier list mode for the filter*/
;;;389        CAN1->FM1R |= (uint32_t)filter_number_bit_pos;
0000ac  4a15              LDR      r2,|L7.260|
0000ae  1d12              ADDS     r2,r2,#4
0000b0  6812              LDR      r2,[r2,#0]
0000b2  430a              ORRS     r2,r2,r1
0000b4  4b13              LDR      r3,|L7.260|
0000b6  1d1b              ADDS     r3,r3,#4
0000b8  601a              STR      r2,[r3,#0]
                  |L7.186|
;;;390      }
;;;391    
;;;392      /* Filter FIFO assignment */
;;;393      if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0)
0000ba  8902              LDRH     r2,[r0,#8]
0000bc  b932              CBNZ     r2,|L7.204|
;;;394      {
;;;395        /* FIFO 0 assignation for the filter */
;;;396        CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos;
0000be  4a11              LDR      r2,|L7.260|
0000c0  3214              ADDS     r2,r2,#0x14
0000c2  6812              LDR      r2,[r2,#0]
0000c4  438a              BICS     r2,r2,r1
0000c6  4b0f              LDR      r3,|L7.260|
0000c8  3314              ADDS     r3,r3,#0x14
0000ca  601a              STR      r2,[r3,#0]
                  |L7.204|
;;;397      }
;;;398    
;;;399      if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1)
0000cc  8902              LDRH     r2,[r0,#8]
0000ce  2a01              CMP      r2,#1
0000d0  d106              BNE      |L7.224|
;;;400      {
;;;401        /* FIFO 1 assignation for the filter */
;;;402        CAN1->FFA1R |= (uint32_t)filter_number_bit_pos;
0000d2  4a0c              LDR      r2,|L7.260|
0000d4  3214              ADDS     r2,r2,#0x14
0000d6  6812              LDR      r2,[r2,#0]
0000d8  430a              ORRS     r2,r2,r1
0000da  4b0a              LDR      r3,|L7.260|
0000dc  3314              ADDS     r3,r3,#0x14
0000de  601a              STR      r2,[r3,#0]
                  |L7.224|
;;;403      }
;;;404      
;;;405      /* Filter activation */
;;;406      if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
0000e0  7b42              LDRB     r2,[r0,#0xd]
0000e2  2a01              CMP      r2,#1
0000e4  d106              BNE      |L7.244|
;;;407      {
;;;408        CAN1->FA1R |= filter_number_bit_pos;
0000e6  4a07              LDR      r2,|L7.260|
0000e8  321c              ADDS     r2,r2,#0x1c
0000ea  6812              LDR      r2,[r2,#0]
0000ec  430a              ORRS     r2,r2,r1
0000ee  4b05              LDR      r3,|L7.260|
0000f0  331c              ADDS     r3,r3,#0x1c
0000f2  601a              STR      r2,[r3,#0]
                  |L7.244|
;;;409      }
;;;410    
;;;411      /* Leave the initialisation mode for the filter */
;;;412      CAN1->FMR &= ~FMR_FINIT;
0000f4  4a03              LDR      r2,|L7.260|
0000f6  6812              LDR      r2,[r2,#0]
0000f8  f0220201          BIC      r2,r2,#1
0000fc  4b01              LDR      r3,|L7.260|
0000fe  601a              STR      r2,[r3,#0]
;;;413    }
000100  bd10              POP      {r4,pc}
;;;414    
                          ENDP

000102  0000              DCW      0x0000
                  |L7.260|
                          DCD      0x40006600

                          AREA ||i.CAN_GetFlagStatus||, CODE, READONLY, ALIGN=1

                  CAN_GetFlagStatus PROC
;;;1326     */
;;;1327   FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
000000  b510              PUSH     {r4,lr}
;;;1328   {
000002  4602              MOV      r2,r0
;;;1329     FlagStatus bitstatus = RESET;
000004  2000              MOVS     r0,#0
;;;1330     
;;;1331     /* Check the parameters */
;;;1332     assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;1333     assert_param(IS_CAN_GET_FLAG(CAN_FLAG));
;;;1334     
;;;1335   
;;;1336     if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET)
000006  f4110f70          TST      r1,#0xf00000
00000a  d008              BEQ      |L8.30|
;;;1337     { 
;;;1338       /* Check the status of the specified CAN flag */
;;;1339       if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
00000c  6993              LDR      r3,[r2,#0x18]
00000e  f3c10413          UBFX     r4,r1,#0,#20
000012  4223              TST      r3,r4
000014  d001              BEQ      |L8.26|
;;;1340       { 
;;;1341         /* CAN_FLAG is set */
;;;1342         bitstatus = SET;
000016  2001              MOVS     r0,#1
000018  e02d              B        |L8.118|
                  |L8.26|
;;;1343       }
;;;1344       else
;;;1345       { 
;;;1346         /* CAN_FLAG is reset */
;;;1347         bitstatus = RESET;
00001a  2000              MOVS     r0,#0
00001c  e02b              B        |L8.118|
                  |L8.30|
;;;1348       }
;;;1349     }
;;;1350     else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET)
00001e  f0117f80          TST      r1,#0x1000000
000022  d008              BEQ      |L8.54|
;;;1351     { 
;;;1352       /* Check the status of the specified CAN flag */
;;;1353       if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
000024  6853              LDR      r3,[r2,#4]
000026  f3c10413          UBFX     r4,r1,#0,#20
00002a  4223              TST      r3,r4
00002c  d001              BEQ      |L8.50|
;;;1354       { 
;;;1355         /* CAN_FLAG is set */
;;;1356         bitstatus = SET;
00002e  2001              MOVS     r0,#1
000030  e021              B        |L8.118|
                  |L8.50|
;;;1357       }
;;;1358       else
;;;1359       { 
;;;1360         /* CAN_FLAG is reset */
;;;1361         bitstatus = RESET;
000032  2000              MOVS     r0,#0
000034  e01f              B        |L8.118|
                  |L8.54|
;;;1362       }
;;;1363     }
;;;1364     else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET)
000036  f0116f00          TST      r1,#0x8000000
00003a  d008              BEQ      |L8.78|
;;;1365     { 
;;;1366       /* Check the status of the specified CAN flag */
;;;1367       if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
00003c  6893              LDR      r3,[r2,#8]
00003e  f3c10413          UBFX     r4,r1,#0,#20
000042  4223              TST      r3,r4
000044  d001              BEQ      |L8.74|
;;;1368       { 
;;;1369         /* CAN_FLAG is set */
;;;1370         bitstatus = SET;
000046  2001              MOVS     r0,#1
000048  e015              B        |L8.118|
                  |L8.74|
;;;1371       }
;;;1372       else
;;;1373       { 
;;;1374         /* CAN_FLAG is reset */
;;;1375         bitstatus = RESET;
00004a  2000              MOVS     r0,#0
00004c  e013              B        |L8.118|
                  |L8.78|
;;;1376       }
;;;1377     }
;;;1378     else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET)
00004e  f0117f00          TST      r1,#0x2000000
000052  d008              BEQ      |L8.102|
;;;1379     { 
;;;1380       /* Check the status of the specified CAN flag */
;;;1381       if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
000054  68d3              LDR      r3,[r2,#0xc]
000056  f3c10413          UBFX     r4,r1,#0,#20
00005a  4223              TST      r3,r4
00005c  d001              BEQ      |L8.98|
;;;1382       { 
;;;1383         /* CAN_FLAG is set */
;;;1384         bitstatus = SET;
00005e  2001              MOVS     r0,#1
000060  e009              B        |L8.118|
                  |L8.98|
;;;1385       }
;;;1386       else
;;;1387       { 
;;;1388         /* CAN_FLAG is reset */
;;;1389         bitstatus = RESET;
000062  2000              MOVS     r0,#0
000064  e007              B        |L8.118|
                  |L8.102|
;;;1390       }
;;;1391     }
;;;1392     else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */
;;;1393     { 
;;;1394       /* Check the status of the specified CAN flag */
;;;1395       if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
000066  6913              LDR      r3,[r2,#0x10]
000068  f3c10413          UBFX     r4,r1,#0,#20
00006c  4223              TST      r3,r4
00006e  d001              BEQ      |L8.116|
;;;1396       { 
;;;1397         /* CAN_FLAG is set */
;;;1398         bitstatus = SET;
000070  2001              MOVS     r0,#1
000072  e000              B        |L8.118|
                  |L8.116|
;;;1399       }
;;;1400       else
;;;1401       { 
;;;1402         /* CAN_FLAG is reset */
;;;1403         bitstatus = RESET;
000074  2000              MOVS     r0,#0
                  |L8.118|
;;;1404       }
;;;1405     }
;;;1406     /* Return the CAN_FLAG status */
;;;1407     return  bitstatus;
;;;1408   }
000076  bd10              POP      {r4,pc}
;;;1409   
                          ENDP


                          AREA ||i.CAN_GetITStatus||, CODE, READONLY, ALIGN=2

                  CAN_GetITStatus PROC
;;;1486     */
;;;1487   ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT)
000000  b570              PUSH     {r4-r6,lr}
;;;1488   {
000002  4604              MOV      r4,r0
000004  460d              MOV      r5,r1
;;;1489     ITStatus itstatus = RESET;
000006  2600              MOVS     r6,#0
;;;1490     /* Check the parameters */
;;;1491     assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;1492     assert_param(IS_CAN_IT(CAN_IT));
;;;1493     
;;;1494     /* check the interrupt enable bit */
;;;1495    if((CANx->IER & CAN_IT) != RESET)
000008  6960              LDR      r0,[r4,#0x14]
00000a  4228              TST      r0,r5
00000c  d071              BEQ      |L9.242|
;;;1496    {
;;;1497      /* in case the Interrupt is enabled, .... */
;;;1498       switch (CAN_IT)
00000e  f5b57f80          CMP      r5,#0x100
000012  d05c              BEQ      |L9.206|
000014  dc10              BGT      |L9.56|
000016  2d08              CMP      r5,#8
000018  d035              BEQ      |L9.134|
00001a  dc06              BGT      |L9.42|
00001c  2d01              CMP      r5,#1
00001e  d020              BEQ      |L9.98|
000020  2d02              CMP      r5,#2
000022  d024              BEQ      |L9.110|
000024  2d04              CMP      r5,#4
000026  d172              BNE      |L9.270|
000028  e027              B        |L9.122|
                  |L9.42|
00002a  2d10              CMP      r5,#0x10
00002c  d031              BEQ      |L9.146|
00002e  2d20              CMP      r5,#0x20
000030  d035              BEQ      |L9.158|
000032  2d40              CMP      r5,#0x40
000034  d16b              BNE      |L9.270|
000036  e038              B        |L9.170|
                  |L9.56|
000038  f5b54f00          CMP      r5,#0x8000
00003c  d060              BEQ      |L9.256|
00003e  dc09              BGT      |L9.84|
000040  f5b57f00          CMP      r5,#0x200
000044  d049              BEQ      |L9.218|
000046  f5b56f80          CMP      r5,#0x400
00004a  d04c              BEQ      |L9.230|
00004c  f5b56f00          CMP      r5,#0x800
000050  d15d              BNE      |L9.270|
000052  e04f              B        |L9.244|
                  |L9.84|
000054  f5b53f80          CMP      r5,#0x10000
000058  d02d              BEQ      |L9.182|
00005a  f5b53f00          CMP      r5,#0x20000
00005e  d156              BNE      |L9.270|
000060  e02f              B        |L9.194|
                  |L9.98|
;;;1499       {
;;;1500         case CAN_IT_TME:
;;;1501           /* Check CAN_TSR_RQCPx bits */
;;;1502           itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2);  
000062  68a0              LDR      r0,[r4,#8]
000064  492d              LDR      r1,|L9.284|
000066  f7fffffe          BL       CheckITStatus
00006a  4606              MOV      r6,r0
;;;1503           break;
00006c  e051              B        |L9.274|
                  |L9.110|
;;;1504         case CAN_IT_FMP0:
;;;1505           /* Check CAN_RF0R_FMP0 bit */
;;;1506           itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0);  
00006e  68e0              LDR      r0,[r4,#0xc]
000070  2103              MOVS     r1,#3
000072  f7fffffe          BL       CheckITStatus
000076  4606              MOV      r6,r0
;;;1507           break;
000078  e04b              B        |L9.274|
                  |L9.122|
;;;1508         case CAN_IT_FF0:
;;;1509           /* Check CAN_RF0R_FULL0 bit */
;;;1510           itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0);  
00007a  68e0              LDR      r0,[r4,#0xc]
00007c  2108              MOVS     r1,#8
00007e  f7fffffe          BL       CheckITStatus
000082  4606              MOV      r6,r0
;;;1511           break;
000084  e045              B        |L9.274|
                  |L9.134|
;;;1512         case CAN_IT_FOV0:
;;;1513           /* Check CAN_RF0R_FOVR0 bit */
;;;1514           itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0);  
000086  68e0              LDR      r0,[r4,#0xc]
000088  2110              MOVS     r1,#0x10
00008a  f7fffffe          BL       CheckITStatus
00008e  4606              MOV      r6,r0
;;;1515           break;
000090  e03f              B        |L9.274|
                  |L9.146|
;;;1516         case CAN_IT_FMP1:
;;;1517           /* Check CAN_RF1R_FMP1 bit */
;;;1518           itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1);  
000092  6920              LDR      r0,[r4,#0x10]
000094  2103              MOVS     r1,#3
000096  f7fffffe          BL       CheckITStatus
00009a  4606              MOV      r6,r0
;;;1519           break;
00009c  e039              B        |L9.274|
                  |L9.158|
;;;1520         case CAN_IT_FF1:
;;;1521           /* Check CAN_RF1R_FULL1 bit */
;;;1522           itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1);  
00009e  6920              LDR      r0,[r4,#0x10]
0000a0  2108              MOVS     r1,#8
0000a2  f7fffffe          BL       CheckITStatus
0000a6  4606              MOV      r6,r0
;;;1523           break;
0000a8  e033              B        |L9.274|
                  |L9.170|
;;;1524         case CAN_IT_FOV1:
;;;1525           /* Check CAN_RF1R_FOVR1 bit */
;;;1526           itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1);  
0000aa  6920              LDR      r0,[r4,#0x10]
0000ac  2110              MOVS     r1,#0x10
0000ae  f7fffffe          BL       CheckITStatus
0000b2  4606              MOV      r6,r0
;;;1527           break;
0000b4  e02d              B        |L9.274|
                  |L9.182|
;;;1528         case CAN_IT_WKU:
;;;1529           /* Check CAN_MSR_WKUI bit */
;;;1530           itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI);  
0000b6  6860              LDR      r0,[r4,#4]
0000b8  2108              MOVS     r1,#8
0000ba  f7fffffe          BL       CheckITStatus
0000be  4606              MOV      r6,r0
;;;1531           break;
0000c0  e027              B        |L9.274|
                  |L9.194|
;;;1532         case CAN_IT_SLK:
;;;1533           /* Check CAN_MSR_SLAKI bit */
;;;1534           itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI);  
0000c2  6860              LDR      r0,[r4,#4]
0000c4  2110              MOVS     r1,#0x10
0000c6  f7fffffe          BL       CheckITStatus
0000ca  4606              MOV      r6,r0
;;;1535           break;
0000cc  e021              B        |L9.274|
                  |L9.206|
;;;1536         case CAN_IT_EWG:
;;;1537           /* Check CAN_ESR_EWGF bit */
;;;1538           itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF);  
0000ce  69a0              LDR      r0,[r4,#0x18]
0000d0  2101              MOVS     r1,#1
0000d2  f7fffffe          BL       CheckITStatus
0000d6  4606              MOV      r6,r0
;;;1539           break;
0000d8  e01b              B        |L9.274|
                  |L9.218|
;;;1540         case CAN_IT_EPV:
;;;1541           /* Check CAN_ESR_EPVF bit */
;;;1542           itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF);  
0000da  69a0              LDR      r0,[r4,#0x18]
0000dc  2102              MOVS     r1,#2
0000de  f7fffffe          BL       CheckITStatus
0000e2  4606              MOV      r6,r0
;;;1543           break;
0000e4  e015              B        |L9.274|
                  |L9.230|
;;;1544         case CAN_IT_BOF:
;;;1545           /* Check CAN_ESR_BOFF bit */
;;;1546           itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF);  
0000e6  69a0              LDR      r0,[r4,#0x18]
0000e8  2104              MOVS     r1,#4
0000ea  f7fffffe          BL       CheckITStatus
0000ee  4606              MOV      r6,r0
;;;1547           break;
0000f0  e00f              B        |L9.274|
                  |L9.242|
0000f2  e00f              B        |L9.276|
                  |L9.244|
;;;1548         case CAN_IT_LEC:
;;;1549           /* Check CAN_ESR_LEC bit */
;;;1550           itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC);  
0000f4  69a0              LDR      r0,[r4,#0x18]
0000f6  2170              MOVS     r1,#0x70
0000f8  f7fffffe          BL       CheckITStatus
0000fc  4606              MOV      r6,r0
;;;1551           break;
0000fe  e008              B        |L9.274|
                  |L9.256|
;;;1552         case CAN_IT_ERR:
;;;1553           /* Check CAN_MSR_ERRI bit */ 
;;;1554           itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI); 
000100  6860              LDR      r0,[r4,#4]
000102  2104              MOVS     r1,#4
000104  f7fffffe          BL       CheckITStatus
000108  4606              MOV      r6,r0
;;;1555           break;
00010a  e002              B        |L9.274|
00010c  e7ff              B        |L9.270|
                  |L9.270|
;;;1556         default:
;;;1557           /* in case of error, return RESET */
;;;1558           itstatus = RESET;
00010e  2600              MOVS     r6,#0
;;;1559           break;
000110  bf00              NOP      
                  |L9.274|
000112  e000              B        |L9.278|
                  |L9.276|
;;;1560       }
;;;1561     }
;;;1562     else
;;;1563     {
;;;1564      /* in case the Interrupt is not enabled, return RESET */
;;;1565       itstatus  = RESET;
000114  2600              MOVS     r6,#0
                  |L9.278|
;;;1566     }
;;;1567     
;;;1568     /* Return the CAN_IT status */
;;;1569     return  itstatus;
000116  4630              MOV      r0,r6
;;;1570   }
000118  bd70              POP      {r4-r6,pc}
;;;1571   
                          ENDP

00011a  0000              DCW      0x0000
                  |L9.284|
                          DCD      0x00010101

                          AREA ||i.CAN_GetLSBTransmitErrorCounter||, CODE, READONLY, ALIGN=1

                  CAN_GetLSBTransmitErrorCounter PROC
;;;1079     */
;;;1080   uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx)
000000  4601              MOV      r1,r0
;;;1081   {
;;;1082     uint8_t counter=0;
000002  2000              MOVS     r0,#0
;;;1083     
;;;1084     /* Check the parameters */
;;;1085     assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;1086     
;;;1087     /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
;;;1088     counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16);
000004  698a              LDR      r2,[r1,#0x18]
000006  f3c24007          UBFX     r0,r2,#16,#8
;;;1089     
;;;1090     /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
;;;1091     return counter;
;;;1092   }
00000a  4770              BX       lr
;;;1093   /**
                          ENDP


                          AREA ||i.CAN_GetLastErrorCode||, CODE, READONLY, ALIGN=1

                  CAN_GetLastErrorCode PROC
;;;1034     */
;;;1035   uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx)
000000  4601              MOV      r1,r0
;;;1036   {
;;;1037     uint8_t errorcode=0;
000002  2000              MOVS     r0,#0
;;;1038     
;;;1039     /* Check the parameters */
;;;1040     assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;1041     
;;;1042     /* Get the error code*/
;;;1043     errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC);
000004  698a              LDR      r2,[r1,#0x18]
000006  f0020070          AND      r0,r2,#0x70
;;;1044     
;;;1045     /* Return the error code*/
;;;1046     return errorcode;
;;;1047   }
00000a  4770              BX       lr
;;;1048   
                          ENDP


                          AREA ||i.CAN_GetReceiveErrorCounter||, CODE, READONLY, ALIGN=1

                  CAN_GetReceiveErrorCounter PROC
;;;1059     */
;;;1060   uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx)
000000  4601              MOV      r1,r0
;;;1061   {
;;;1062     uint8_t counter=0;
000002  2000              MOVS     r0,#0
;;;1063     
;;;1064     /* Check the parameters */
;;;1065     assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;1066     
;;;1067     /* Get the Receive Error Counter*/
;;;1068     counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24);
000004  698a              LDR      r2,[r1,#0x18]
000006  0e10              LSRS     r0,r2,#24
;;;1069     
;;;1070     /* Return the Receive Error Counter*/
;;;1071     return counter;
;;;1072   }
000008  4770              BX       lr
;;;1073   
                          ENDP


                          AREA ||i.CAN_ITConfig||, CODE, READONLY, ALIGN=1

                  CAN_ITConfig PROC
;;;1286     */
;;;1287   void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState)
000000  b11a              CBZ      r2,|L13.10|
;;;1288   {
;;;1289     /* Check the parameters */
;;;1290     assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;1291     assert_param(IS_CAN_IT(CAN_IT));
;;;1292     assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;1293   
;;;1294     if (NewState != DISABLE)
;;;1295     {
;;;1296       /* Enable the selected CANx interrupt */
;;;1297       CANx->IER |= CAN_IT;
000002  6943              LDR      r3,[r0,#0x14]
000004  430b              ORRS     r3,r3,r1
000006  6143              STR      r3,[r0,#0x14]
000008  e002              B        |L13.16|
                  |L13.10|
;;;1298     }
;;;1299     else
;;;1300     {
;;;1301       /* Disable the selected CANx interrupt */
;;;1302       CANx->IER &= ~CAN_IT;
00000a  6943              LDR      r3,[r0,#0x14]
00000c  438b              BICS     r3,r3,r1
00000e  6143              STR      r3,[r0,#0x14]
                  |L13.16|
;;;1303     }
;;;1304   }
000010  4770              BX       lr
;;;1305   /**
                          ENDP


                          AREA ||i.CAN_Init||, CODE, READONLY, ALIGN=1

                  CAN_Init PROC
;;;191      */
;;;192    uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct)
000000  b530              PUSH     {r4,r5,lr}
;;;193    {
000002  4602              MOV      r2,r0
;;;194      uint8_t InitStatus = CAN_InitStatus_Failed;
000004  2000              MOVS     r0,#0
;;;195      uint32_t wait_ack = 0x00000000;
000006  2300              MOVS     r3,#0
;;;196      /* Check the parameters */
;;;197      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;198      assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM));
;;;199      assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM));
;;;200      assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM));
;;;201      assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART));
;;;202      assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM));
;;;203      assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP));
;;;204      assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode));
;;;205      assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW));
;;;206      assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1));
;;;207      assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2));
;;;208      assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler));
;;;209    
;;;210      /* Exit from sleep mode */
;;;211      CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
000008  6814              LDR      r4,[r2,#0]
00000a  f0240402          BIC      r4,r4,#2
00000e  6014              STR      r4,[r2,#0]
;;;212    
;;;213      /* Request initialisation */
;;;214      CANx->MCR |= CAN_MCR_INRQ ;
000010  6814              LDR      r4,[r2,#0]
000012  f0440401          ORR      r4,r4,#1
000016  6014              STR      r4,[r2,#0]
;;;215    
;;;216      /* Wait the acknowledge */
;;;217      while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
000018  e000              B        |L14.28|
                  |L14.26|
;;;218      {
;;;219        wait_ack++;
00001a  1c5b              ADDS     r3,r3,#1
                  |L14.28|
00001c  6854              LDR      r4,[r2,#4]            ;217
00001e  f0040401          AND      r4,r4,#1              ;217
000022  2c01              CMP      r4,#1                 ;217
000024  d003              BEQ      |L14.46|
000026  f5a3447f          SUB      r4,r3,#0xff00         ;217
00002a  3cff              SUBS     r4,r4,#0xff           ;217
00002c  d1f5              BNE      |L14.26|
                  |L14.46|
;;;220      }
;;;221    
;;;222      /* Check acknowledge */
;;;223      if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
00002e  6854              LDR      r4,[r2,#4]
000030  f0040401          AND      r4,r4,#1
000034  2c01              CMP      r4,#1
000036  d001              BEQ      |L14.60|
;;;224      {
;;;225        InitStatus = CAN_InitStatus_Failed;
000038  2000              MOVS     r0,#0
00003a  e06e              B        |L14.282|
                  |L14.60|
;;;226      }
;;;227      else 
;;;228      {
;;;229        /* Set the time triggered communication mode */
;;;230        if (CAN_InitStruct->CAN_TTCM == ENABLE)
00003c  798c              LDRB     r4,[r1,#6]
00003e  2c01              CMP      r4,#1
000040  d104              BNE      |L14.76|
;;;231        {
;;;232          CANx->MCR |= CAN_MCR_TTCM;
000042  6814              LDR      r4,[r2,#0]
000044  f0440480          ORR      r4,r4,#0x80
000048  6014              STR      r4,[r2,#0]
00004a  e003              B        |L14.84|
                  |L14.76|
;;;233        }
;;;234        else
;;;235        {
;;;236          CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM;
00004c  6814              LDR      r4,[r2,#0]
00004e  f0240480          BIC      r4,r4,#0x80
000052  6014              STR      r4,[r2,#0]
                  |L14.84|
;;;237        }
;;;238    
;;;239        /* Set the automatic bus-off management */
;;;240        if (CAN_InitStruct->CAN_ABOM == ENABLE)
000054  79cc              LDRB     r4,[r1,#7]
000056  2c01              CMP      r4,#1
000058  d104              BNE      |L14.100|
;;;241        {
;;;242          CANx->MCR |= CAN_MCR_ABOM;
00005a  6814              LDR      r4,[r2,#0]
00005c  f0440440          ORR      r4,r4,#0x40
000060  6014              STR      r4,[r2,#0]
000062  e003              B        |L14.108|
                  |L14.100|
;;;243        }
;;;244        else
;;;245        {
;;;246          CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM;
000064  6814              LDR      r4,[r2,#0]
000066  f0240440          BIC      r4,r4,#0x40
00006a  6014              STR      r4,[r2,#0]
                  |L14.108|
;;;247        }
;;;248    
;;;249        /* Set the automatic wake-up mode */
;;;250        if (CAN_InitStruct->CAN_AWUM == ENABLE)
00006c  7a0c              LDRB     r4,[r1,#8]
00006e  2c01              CMP      r4,#1
000070  d104              BNE      |L14.124|
;;;251        {
;;;252          CANx->MCR |= CAN_MCR_AWUM;
000072  6814              LDR      r4,[r2,#0]
000074  f0440420          ORR      r4,r4,#0x20
000078  6014              STR      r4,[r2,#0]
00007a  e003              B        |L14.132|
                  |L14.124|
;;;253        }
;;;254        else
;;;255        {
;;;256          CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM;
00007c  6814              LDR      r4,[r2,#0]
00007e  f0240420          BIC      r4,r4,#0x20
000082  6014              STR      r4,[r2,#0]
                  |L14.132|
;;;257        }
;;;258    
;;;259        /* Set the no automatic retransmission */
;;;260        if (CAN_InitStruct->CAN_NART == ENABLE)
000084  7a4c              LDRB     r4,[r1,#9]
000086  2c01              CMP      r4,#1
000088  d104              BNE      |L14.148|
;;;261        {
;;;262          CANx->MCR |= CAN_MCR_NART;
00008a  6814              LDR      r4,[r2,#0]
00008c  f0440410          ORR      r4,r4,#0x10
000090  6014              STR      r4,[r2,#0]
000092  e003              B        |L14.156|
                  |L14.148|
;;;263        }
;;;264        else
;;;265        {
;;;266          CANx->MCR &= ~(uint32_t)CAN_MCR_NART;
000094  6814              LDR      r4,[r2,#0]
000096  f0240410          BIC      r4,r4,#0x10
00009a  6014              STR      r4,[r2,#0]
                  |L14.156|
;;;267        }
;;;268    
;;;269        /* Set the receive FIFO locked mode */
;;;270        if (CAN_InitStruct->CAN_RFLM == ENABLE)
00009c  7a8c              LDRB     r4,[r1,#0xa]
00009e  2c01              CMP      r4,#1
0000a0  d104              BNE      |L14.172|
;;;271        {
;;;272          CANx->MCR |= CAN_MCR_RFLM;
0000a2  6814              LDR      r4,[r2,#0]
0000a4  f0440408          ORR      r4,r4,#8
0000a8  6014              STR      r4,[r2,#0]
0000aa  e003              B        |L14.180|
                  |L14.172|
;;;273        }
;;;274        else
;;;275        {
;;;276          CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM;
0000ac  6814              LDR      r4,[r2,#0]
0000ae  f0240408          BIC      r4,r4,#8
0000b2  6014              STR      r4,[r2,#0]
                  |L14.180|
;;;277        }
;;;278    
;;;279        /* Set the transmit FIFO priority */
;;;280        if (CAN_InitStruct->CAN_TXFP == ENABLE)
0000b4  7acc              LDRB     r4,[r1,#0xb]
0000b6  2c01              CMP      r4,#1
0000b8  d104              BNE      |L14.196|
;;;281        {
;;;282          CANx->MCR |= CAN_MCR_TXFP;
0000ba  6814              LDR      r4,[r2,#0]
0000bc  f0440404          ORR      r4,r4,#4
0000c0  6014              STR      r4,[r2,#0]
0000c2  e003              B        |L14.204|
                  |L14.196|
;;;283        }
;;;284        else
;;;285        {
;;;286          CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP;
0000c4  6814              LDR      r4,[r2,#0]
0000c6  f0240404          BIC      r4,r4,#4
0000ca  6014              STR      r4,[r2,#0]
                  |L14.204|
;;;287        }
;;;288    
;;;289        /* Set the bit timing register */
;;;290        CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \
0000cc  788c              LDRB     r4,[r1,#2]
0000ce  07a4              LSLS     r4,r4,#30
0000d0  78cd              LDRB     r5,[r1,#3]
0000d2  ea446405          ORR      r4,r4,r5,LSL #24
0000d6  790d              LDRB     r5,[r1,#4]
0000d8  ea444405          ORR      r4,r4,r5,LSL #16
0000dc  794d              LDRB     r5,[r1,#5]
0000de  ea445405          ORR      r4,r4,r5,LSL #20
0000e2  880d              LDRH     r5,[r1,#0]
0000e4  1e6d              SUBS     r5,r5,#1
0000e6  432c              ORRS     r4,r4,r5
0000e8  61d4              STR      r4,[r2,#0x1c]
;;;291                    ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \
;;;292                    ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \
;;;293                    ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \
;;;294                   ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1);
;;;295    
;;;296        /* Request leave initialisation */
;;;297        CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ;
0000ea  6814              LDR      r4,[r2,#0]
0000ec  f0240401          BIC      r4,r4,#1
0000f0  6014              STR      r4,[r2,#0]
;;;298    
;;;299       /* Wait the acknowledge */
;;;300       wait_ack = 0;
0000f2  2300              MOVS     r3,#0
;;;301    
;;;302       while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
0000f4  e000              B        |L14.248|
                  |L14.246|
;;;303       {
;;;304         wait_ack++;
0000f6  1c5b              ADDS     r3,r3,#1
                  |L14.248|
0000f8  6854              LDR      r4,[r2,#4]            ;302
0000fa  f0040401          AND      r4,r4,#1              ;302
0000fe  2c01              CMP      r4,#1                 ;302
000100  d103              BNE      |L14.266|
000102  f5a3447f          SUB      r4,r3,#0xff00         ;302
000106  3cff              SUBS     r4,r4,#0xff           ;302
000108  d1f5              BNE      |L14.246|
                  |L14.266|
;;;305       }
;;;306    
;;;307        /* ...and check acknowledged */
;;;308        if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
00010a  6854              LDR      r4,[r2,#4]
00010c  f0040401          AND      r4,r4,#1
000110  2c01              CMP      r4,#1
000112  d101              BNE      |L14.280|
;;;309        {
;;;310          InitStatus = CAN_InitStatus_Failed;
000114  2000              MOVS     r0,#0
000116  e000              B        |L14.282|
                  |L14.280|
;;;311        }
;;;312        else
;;;313        {
;;;314          InitStatus = CAN_InitStatus_Success ;
000118  2001              MOVS     r0,#1
                  |L14.282|
;;;315        }
;;;316      }
;;;317    
;;;318      /* At this step, return the status of initialization */
;;;319      return InitStatus;
;;;320    }
00011a  bd30              POP      {r4,r5,pc}
;;;321    
                          ENDP


                          AREA ||i.CAN_MessagePending||, CODE, READONLY, ALIGN=1

                  CAN_MessagePending PROC
;;;816      */
;;;817    uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber)
000000  4602              MOV      r2,r0
;;;818    {
;;;819      uint8_t message_pending=0;
000002  2000              MOVS     r0,#0
;;;820      /* Check the parameters */
;;;821      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;822      assert_param(IS_CAN_FIFO(FIFONumber));
;;;823      if (FIFONumber == CAN_FIFO0)
000004  b919              CBNZ     r1,|L15.14|
;;;824      {
;;;825        message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03);
000006  68d3              LDR      r3,[r2,#0xc]
000008  f0030003          AND      r0,r3,#3
00000c  e006              B        |L15.28|
                  |L15.14|
;;;826      }
;;;827      else if (FIFONumber == CAN_FIFO1)
00000e  2901              CMP      r1,#1
000010  d103              BNE      |L15.26|
;;;828      {
;;;829        message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03);
000012  6913              LDR      r3,[r2,#0x10]
000014  f0030003          AND      r0,r3,#3
000018  e000              B        |L15.28|
                  |L15.26|
;;;830      }
;;;831      else
;;;832      {
;;;833        message_pending = 0;
00001a  2000              MOVS     r0,#0
                  |L15.28|
;;;834      }
;;;835      return message_pending;
;;;836    }
00001c  4770              BX       lr
;;;837    /**
                          ENDP


                          AREA ||i.CAN_OperatingModeRequest||, CODE, READONLY, ALIGN=1

                  CAN_OperatingModeRequest PROC
;;;866      */
;;;867    uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode)
000000  b510              PUSH     {r4,lr}
;;;868    {
000002  4602              MOV      r2,r0
000004  460b              MOV      r3,r1
;;;869      uint8_t status = CAN_ModeStatus_Failed;
000006  2000              MOVS     r0,#0
;;;870      
;;;871      /* Timeout for INAK or also for SLAK bits*/
;;;872      uint32_t timeout = INAK_TIMEOUT; 
000008  f64f71ff          MOV      r1,#0xffff
;;;873    
;;;874      /* Check the parameters */
;;;875      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;876      assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode));
;;;877    
;;;878      if (CAN_OperatingMode == CAN_OperatingMode_Initialization)
00000c  b9bb              CBNZ     r3,|L16.62|
;;;879      {
;;;880        /* Request initialisation */
;;;881        CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ);
00000e  6814              LDR      r4,[r2,#0]
000010  f0240402          BIC      r4,r4,#2
000014  f0440401          ORR      r4,r4,#1
000018  6014              STR      r4,[r2,#0]
;;;882    
;;;883        /* Wait the acknowledge */
;;;884        while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0))
00001a  e000              B        |L16.30|
                  |L16.28|
;;;885        {
;;;886          timeout--;
00001c  1e49              SUBS     r1,r1,#1
                  |L16.30|
00001e  6854              LDR      r4,[r2,#4]            ;884
000020  f0040403          AND      r4,r4,#3              ;884
000024  2c01              CMP      r4,#1                 ;884
000026  d001              BEQ      |L16.44|
000028  2900              CMP      r1,#0                 ;884
00002a  d1f7              BNE      |L16.28|
                  |L16.44|
;;;887        }
;;;888        if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK)
00002c  6854              LDR      r4,[r2,#4]
00002e  f0040403          AND      r4,r4,#3
000032  2c01              CMP      r4,#1
000034  d001              BEQ      |L16.58|
;;;889        {
;;;890          status = CAN_ModeStatus_Failed;
000036  2000              MOVS     r0,#0
000038  e032              B        |L16.160|
                  |L16.58|
;;;891        }
;;;892        else
;;;893        {
;;;894          status = CAN_ModeStatus_Success;
00003a  2001              MOVS     r0,#1
00003c  e030              B        |L16.160|
                  |L16.62|
;;;895        }
;;;896      }
;;;897      else  if (CAN_OperatingMode == CAN_OperatingMode_Normal)
00003e  2b01              CMP      r3,#1
000040  d113              BNE      |L16.106|
;;;898      {
;;;899        /* Request leave initialisation and sleep mode  and enter Normal mode */
;;;900        CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ));
000042  6814              LDR      r4,[r2,#0]
000044  f0240403          BIC      r4,r4,#3
000048  6014              STR      r4,[r2,#0]
;;;901    
;;;902        /* Wait the acknowledge */
;;;903        while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0))
00004a  e000              B        |L16.78|
                  |L16.76|
;;;904        {
;;;905          timeout--;
00004c  1e49              SUBS     r1,r1,#1
                  |L16.78|
00004e  6854              LDR      r4,[r2,#4]            ;903
000050  f0140f03          TST      r4,#3                 ;903
000054  d001              BEQ      |L16.90|
000056  2900              CMP      r1,#0                 ;903
000058  d1f8              BNE      |L16.76|
                  |L16.90|
;;;906        }
;;;907        if ((CANx->MSR & CAN_MODE_MASK) != 0)
00005a  6854              LDR      r4,[r2,#4]
00005c  f0140f03          TST      r4,#3
000060  d001              BEQ      |L16.102|
;;;908        {
;;;909          status = CAN_ModeStatus_Failed;
000062  2000              MOVS     r0,#0
000064  e01c              B        |L16.160|
                  |L16.102|
;;;910        }
;;;911        else
;;;912        {
;;;913          status = CAN_ModeStatus_Success;
000066  2001              MOVS     r0,#1
000068  e01a              B        |L16.160|
                  |L16.106|
;;;914        }
;;;915      }
;;;916      else  if (CAN_OperatingMode == CAN_OperatingMode_Sleep)
00006a  2b02              CMP      r3,#2
00006c  d117              BNE      |L16.158|
;;;917      {
;;;918        /* Request Sleep mode */
;;;919        CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
00006e  6814              LDR      r4,[r2,#0]
000070  f0240401          BIC      r4,r4,#1
000074  f0440402          ORR      r4,r4,#2
000078  6014              STR      r4,[r2,#0]
;;;920    
;;;921        /* Wait the acknowledge */
;;;922        while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0))
00007a  e000              B        |L16.126|
                  |L16.124|
;;;923        {
;;;924          timeout--;
00007c  1e49              SUBS     r1,r1,#1
                  |L16.126|
00007e  6854              LDR      r4,[r2,#4]            ;922
000080  f0040403          AND      r4,r4,#3              ;922
000084  2c02              CMP      r4,#2                 ;922
000086  d001              BEQ      |L16.140|
000088  2900              CMP      r1,#0                 ;922
00008a  d1f7              BNE      |L16.124|
                  |L16.140|
;;;925        }
;;;926        if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK)
00008c  6854              LDR      r4,[r2,#4]
00008e  f0040403          AND      r4,r4,#3
000092  2c02              CMP      r4,#2
000094  d001              BEQ      |L16.154|
;;;927        {
;;;928          status = CAN_ModeStatus_Failed;
000096  2000              MOVS     r0,#0
000098  e002              B        |L16.160|
                  |L16.154|
;;;929        }
;;;930        else
;;;931        {
;;;932          status = CAN_ModeStatus_Success;
00009a  2001              MOVS     r0,#1
00009c  e000              B        |L16.160|
                  |L16.158|
;;;933        }
;;;934      }
;;;935      else
;;;936      {
;;;937        status = CAN_ModeStatus_Failed;
00009e  2000              MOVS     r0,#0
                  |L16.160|
;;;938      }
;;;939    
;;;940      return  (uint8_t) status;
;;;941    }
0000a0  bd10              POP      {r4,pc}
;;;942    
                          ENDP


                          AREA ||i.CAN_Receive||, CODE, READONLY, ALIGN=1

                  CAN_Receive PROC
;;;744      */
;;;745    void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage)
000000  b510              PUSH     {r4,lr}
;;;746    {
;;;747      /* Check the parameters */
;;;748      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;749      assert_param(IS_CAN_FIFO(FIFONumber));
;;;750      /* Get the Id */
;;;751      RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR;
000002  f50073d8          ADD      r3,r0,#0x1b0
000006  eb031301          ADD      r3,r3,r1,LSL #4
00000a  681b              LDR      r3,[r3,#0]
00000c  f0030304          AND      r3,r3,#4
000010  7213              STRB     r3,[r2,#8]
;;;752      if (RxMessage->IDE == CAN_Id_Standard)
000012  7a13              LDRB     r3,[r2,#8]
000014  b953              CBNZ     r3,|L17.44|
;;;753      {
;;;754        RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21);
000016  f50073d8          ADD      r3,r0,#0x1b0
00001a  eb031301          ADD      r3,r3,r1,LSL #4
00001e  681b              LDR      r3,[r3,#0]
000020  f24074ff          MOV      r4,#0x7ff
000024  ea045353          AND      r3,r4,r3,LSR #21
000028  6013              STR      r3,[r2,#0]
00002a  e009              B        |L17.64|
                  |L17.44|
;;;755      }
;;;756      else
;;;757      {
;;;758        RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3);
00002c  f50073d8          ADD      r3,r0,#0x1b0
000030  eb031301          ADD      r3,r3,r1,LSL #4
000034  681b              LDR      r3,[r3,#0]
000036  f06f4460          MVN      r4,#0xe0000000
00003a  ea0403d3          AND      r3,r4,r3,LSR #3
00003e  6053              STR      r3,[r2,#4]
                  |L17.64|
;;;759      }
;;;760      
;;;761      RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR;
000040  f50073d8          ADD      r3,r0,#0x1b0
000044  eb031301          ADD      r3,r3,r1,LSL #4
000048  681b              LDR      r3,[r3,#0]
00004a  f0030302          AND      r3,r3,#2
00004e  7253              STRB     r3,[r2,#9]
;;;762      /* Get the DLC */
;;;763      RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR;
000050  f50073d8          ADD      r3,r0,#0x1b0
000054  eb031301          ADD      r3,r3,r1,LSL #4
000058  685b              LDR      r3,[r3,#4]
00005a  f003030f          AND      r3,r3,#0xf
00005e  7293              STRB     r3,[r2,#0xa]
;;;764      /* Get the FMI */
;;;765      RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8);
000060  f50073d8          ADD      r3,r0,#0x1b0
000064  eb031301          ADD      r3,r3,r1,LSL #4
000068  685b              LDR      r3,[r3,#4]
00006a  0a1b              LSRS     r3,r3,#8
00006c  74d3              STRB     r3,[r2,#0x13]
;;;766      /* Get the data field */
;;;767      RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR;
00006e  f50073d8          ADD      r3,r0,#0x1b0
000072  eb031301          ADD      r3,r3,r1,LSL #4
000076  689b              LDR      r3,[r3,#8]
000078  72d3              STRB     r3,[r2,#0xb]
;;;768      RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8);
00007a  f50073d8          ADD      r3,r0,#0x1b0
00007e  eb031301          ADD      r3,r3,r1,LSL #4
000082  689b              LDR      r3,[r3,#8]
000084  0a1c              LSRS     r4,r3,#8
000086  7314              STRB     r4,[r2,#0xc]
;;;769      RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16);
000088  f50073d8          ADD      r3,r0,#0x1b0
00008c  eb031301          ADD      r3,r3,r1,LSL #4
000090  689b              LDR      r3,[r3,#8]
000092  0c1c              LSRS     r4,r3,#16
000094  7354              STRB     r4,[r2,#0xd]
;;;770      RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24);
000096  f50073d8          ADD      r3,r0,#0x1b0
00009a  eb031301          ADD      r3,r3,r1,LSL #4
00009e  689b              LDR      r3,[r3,#8]
0000a0  0e1b              LSRS     r3,r3,#24
0000a2  7393              STRB     r3,[r2,#0xe]
;;;771      RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR;
0000a4  f50073d8          ADD      r3,r0,#0x1b0
0000a8  eb031301          ADD      r3,r3,r1,LSL #4
0000ac  68db              LDR      r3,[r3,#0xc]
0000ae  73d3              STRB     r3,[r2,#0xf]
;;;772      RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8);
0000b0  f50073d8          ADD      r3,r0,#0x1b0
0000b4  eb031301          ADD      r3,r3,r1,LSL #4
0000b8  68db              LDR      r3,[r3,#0xc]
0000ba  0a1c              LSRS     r4,r3,#8
0000bc  7414              STRB     r4,[r2,#0x10]
;;;773      RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16);
0000be  f50073d8          ADD      r3,r0,#0x1b0
0000c2  eb031301          ADD      r3,r3,r1,LSL #4
0000c6  68db              LDR      r3,[r3,#0xc]
0000c8  0c1c              LSRS     r4,r3,#16
0000ca  7454              STRB     r4,[r2,#0x11]
;;;774      RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24);
0000cc  f50073d8          ADD      r3,r0,#0x1b0
0000d0  eb031301          ADD      r3,r3,r1,LSL #4
0000d4  68db              LDR      r3,[r3,#0xc]
0000d6  0e1b              LSRS     r3,r3,#24
0000d8  7493              STRB     r3,[r2,#0x12]
;;;775      /* Release the FIFO */
;;;776      /* Release FIFO0 */
;;;777      if (FIFONumber == CAN_FIFO0)
0000da  b921              CBNZ     r1,|L17.230|
;;;778      {
;;;779        CANx->RF0R |= CAN_RF0R_RFOM0;
0000dc  68c3              LDR      r3,[r0,#0xc]
0000de  f0430320          ORR      r3,r3,#0x20
0000e2  60c3              STR      r3,[r0,#0xc]
0000e4  e003              B        |L17.238|
                  |L17.230|
;;;780      }
;;;781      /* Release FIFO1 */
;;;782      else /* FIFONumber == CAN_FIFO1 */
;;;783      {
;;;784        CANx->RF1R |= CAN_RF1R_RFOM1;
0000e6  6903              LDR      r3,[r0,#0x10]
0000e8  f0430320          ORR      r3,r3,#0x20
0000ec  6103              STR      r3,[r0,#0x10]
                  |L17.238|
;;;785      }
;;;786    }
0000ee  bd10              POP      {r4,pc}
;;;787    
                          ENDP


                          AREA ||i.CAN_SlaveStartBank||, CODE, READONLY, ALIGN=2

                  CAN_SlaveStartBank PROC
;;;462      */
;;;463    void CAN_SlaveStartBank(uint8_t CAN_BankNumber) 
000000  490b              LDR      r1,|L18.48|
;;;464    {
;;;465      /* Check the parameters */
;;;466      assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber));
;;;467      
;;;468      /* Enter Initialisation mode for the filter */
;;;469      CAN1->FMR |= FMR_FINIT;
000002  6809              LDR      r1,[r1,#0]
000004  f0410101          ORR      r1,r1,#1
000008  4a09              LDR      r2,|L18.48|
00000a  6011              STR      r1,[r2,#0]
;;;470      
;;;471      /* Select the start slave bank */
;;;472      CAN1->FMR &= (uint32_t)0xFFFFC0F1 ;
00000c  4611              MOV      r1,r2
00000e  6809              LDR      r1,[r1,#0]
000010  f643720e          MOV      r2,#0x3f0e
000014  4391              BICS     r1,r1,r2
000016  4a06              LDR      r2,|L18.48|
000018  6011              STR      r1,[r2,#0]
;;;473      CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8;
00001a  4611              MOV      r1,r2
00001c  6809              LDR      r1,[r1,#0]
00001e  ea412100          ORR      r1,r1,r0,LSL #8
000022  6011              STR      r1,[r2,#0]
;;;474      
;;;475      /* Leave Initialisation mode for the filter */
;;;476      CAN1->FMR &= ~FMR_FINIT;
000024  4611              MOV      r1,r2
000026  6809              LDR      r1,[r1,#0]
000028  f0210101          BIC      r1,r1,#1
00002c  6011              STR      r1,[r2,#0]
;;;477    }
00002e  4770              BX       lr
;;;478    
                          ENDP

                  |L18.48|
                          DCD      0x40006600

                          AREA ||i.CAN_Sleep||, CODE, READONLY, ALIGN=1

                  CAN_Sleep PROC
;;;947      */
;;;948    uint8_t CAN_Sleep(CAN_TypeDef* CANx)
000000  4601              MOV      r1,r0
;;;949    {
;;;950      uint8_t sleepstatus = CAN_Sleep_Failed;
000002  2000              MOVS     r0,#0
;;;951      
;;;952      /* Check the parameters */
;;;953      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;954        
;;;955      /* Request Sleep mode */
;;;956       CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
000004  680a              LDR      r2,[r1,#0]
000006  f0220201          BIC      r2,r2,#1
00000a  f0420202          ORR      r2,r2,#2
00000e  600a              STR      r2,[r1,#0]
;;;957       
;;;958      /* Sleep mode status */
;;;959      if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK)
000010  684a              LDR      r2,[r1,#4]
000012  f0020203          AND      r2,r2,#3
000016  2a02              CMP      r2,#2
000018  d100              BNE      |L19.28|
;;;960      {
;;;961        /* Sleep mode not entered */
;;;962        sleepstatus =  CAN_Sleep_Ok;
00001a  2001              MOVS     r0,#1
                  |L19.28|
;;;963      }
;;;964      /* return sleep mode status */
;;;965       return (uint8_t)sleepstatus;
;;;966    }
00001c  4770              BX       lr
;;;967    
                          ENDP


                          AREA ||i.CAN_StructInit||, CODE, READONLY, ALIGN=1

                  CAN_StructInit PROC
;;;419      */
;;;420    void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
000000  2100              MOVS     r1,#0
;;;421    {
;;;422      /* Reset CAN init structure parameters values */
;;;423      
;;;424      /* Initialize the time triggered communication mode */
;;;425      CAN_InitStruct->CAN_TTCM = DISABLE;
000002  7181              STRB     r1,[r0,#6]
;;;426      
;;;427      /* Initialize the automatic bus-off management */
;;;428      CAN_InitStruct->CAN_ABOM = DISABLE;
000004  71c1              STRB     r1,[r0,#7]
;;;429      
;;;430      /* Initialize the automatic wake-up mode */
;;;431      CAN_InitStruct->CAN_AWUM = DISABLE;
000006  7201              STRB     r1,[r0,#8]
;;;432      
;;;433      /* Initialize the no automatic retransmission */
;;;434      CAN_InitStruct->CAN_NART = DISABLE;
000008  7241              STRB     r1,[r0,#9]
;;;435      
;;;436      /* Initialize the receive FIFO locked mode */
;;;437      CAN_InitStruct->CAN_RFLM = DISABLE;
00000a  7281              STRB     r1,[r0,#0xa]
;;;438      
;;;439      /* Initialize the transmit FIFO priority */
;;;440      CAN_InitStruct->CAN_TXFP = DISABLE;
00000c  72c1              STRB     r1,[r0,#0xb]
;;;441      
;;;442      /* Initialize the CAN_Mode member */
;;;443      CAN_InitStruct->CAN_Mode = CAN_Mode_Normal;
00000e  7081              STRB     r1,[r0,#2]
;;;444      
;;;445      /* Initialize the CAN_SJW member */
;;;446      CAN_InitStruct->CAN_SJW = CAN_SJW_1tq;
000010  70c1              STRB     r1,[r0,#3]
;;;447      
;;;448      /* Initialize the CAN_BS1 member */
;;;449      CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq;
000012  2103              MOVS     r1,#3
000014  7101              STRB     r1,[r0,#4]
;;;450      
;;;451      /* Initialize the CAN_BS2 member */
;;;452      CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq;
000016  2102              MOVS     r1,#2
000018  7141              STRB     r1,[r0,#5]
;;;453      
;;;454      /* Initialize the CAN_Prescaler member */
;;;455      CAN_InitStruct->CAN_Prescaler = 1;
00001a  2101              MOVS     r1,#1
00001c  8001              STRH     r1,[r0,#0]
;;;456    }
00001e  4770              BX       lr
;;;457    
                          ENDP


                          AREA ||i.CAN_TTComModeCmd||, CODE, READONLY, ALIGN=1

                  CAN_TTComModeCmd PROC
;;;517      */
;;;518    void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState)
000000  b1e1              CBZ      r1,|L21.60|
;;;519    {
;;;520      /* Check the parameters */
;;;521      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;522      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;523      if (NewState != DISABLE)
;;;524      {
;;;525        /* Enable the TTCM mode */
;;;526        CANx->MCR |= CAN_MCR_TTCM;
000002  6802              LDR      r2,[r0,#0]
000004  f0420280          ORR      r2,r2,#0x80
000008  6002              STR      r2,[r0,#0]
;;;527    
;;;528        /* Set TGT bits */
;;;529        CANx->sTxMailBox[0].TDTR |= ((uint32_t)CAN_TDT0R_TGT);
00000a  f44f72c2          MOV      r2,#0x184
00000e  5812              LDR      r2,[r2,r0]
000010  f4427380          ORR      r3,r2,#0x100
000014  f44f72c2          MOV      r2,#0x184
000018  5013              STR      r3,[r2,r0]
;;;530        CANx->sTxMailBox[1].TDTR |= ((uint32_t)CAN_TDT1R_TGT);
00001a  f44f72ca          MOV      r2,#0x194
00001e  5812              LDR      r2,[r2,r0]
000020  f4427380          ORR      r3,r2,#0x100
000024  f44f72ca          MOV      r2,#0x194
000028  5013              STR      r3,[r2,r0]
;;;531        CANx->sTxMailBox[2].TDTR |= ((uint32_t)CAN_TDT2R_TGT);
00002a  f44f72d2          MOV      r2,#0x1a4
00002e  5812              LDR      r2,[r2,r0]
000030  f4427380          ORR      r3,r2,#0x100
000034  f44f72d2          MOV      r2,#0x1a4
000038  5013              STR      r3,[r2,r0]
00003a  e01b              B        |L21.116|
                  |L21.60|
;;;532      }
;;;533      else
;;;534      {
;;;535        /* Disable the TTCM mode */
;;;536        CANx->MCR &= (uint32_t)(~(uint32_t)CAN_MCR_TTCM);
00003c  6802              LDR      r2,[r0,#0]
00003e  f0220280          BIC      r2,r2,#0x80
000042  6002              STR      r2,[r0,#0]
;;;537    
;;;538        /* Reset TGT bits */
;;;539        CANx->sTxMailBox[0].TDTR &= ((uint32_t)~CAN_TDT0R_TGT);
000044  f44f72c2          MOV      r2,#0x184
000048  5812              LDR      r2,[r2,r0]
00004a  f4227380          BIC      r3,r2,#0x100
00004e  f44f72c2          MOV      r2,#0x184
000052  5013              STR      r3,[r2,r0]
;;;540        CANx->sTxMailBox[1].TDTR &= ((uint32_t)~CAN_TDT1R_TGT);
000054  f44f72ca          MOV      r2,#0x194
000058  5812              LDR      r2,[r2,r0]
00005a  f4227380          BIC      r3,r2,#0x100
00005e  f44f72ca          MOV      r2,#0x194
000062  5013              STR      r3,[r2,r0]
;;;541        CANx->sTxMailBox[2].TDTR &= ((uint32_t)~CAN_TDT2R_TGT);
000064  f44f72d2          MOV      r2,#0x1a4
000068  5812              LDR      r2,[r2,r0]
00006a  f4227380          BIC      r3,r2,#0x100
00006e  f44f72d2          MOV      r2,#0x1a4
000072  5013              STR      r3,[r2,r0]
                  |L21.116|
;;;542      }
;;;543    }
000074  4770              BX       lr
;;;544    /**
                          ENDP


                          AREA ||i.CAN_Transmit||, CODE, READONLY, ALIGN=1

                  CAN_Transmit PROC
;;;571      */
;;;572    uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage)
000000  b510              PUSH     {r4,lr}
;;;573    {
000002  4602              MOV      r2,r0
;;;574      uint8_t transmit_mailbox = 0;
000004  2000              MOVS     r0,#0
;;;575      /* Check the parameters */
;;;576      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;577      assert_param(IS_CAN_IDTYPE(TxMessage->IDE));
;;;578      assert_param(IS_CAN_RTR(TxMessage->RTR));
;;;579      assert_param(IS_CAN_DLC(TxMessage->DLC));
;;;580    
;;;581      /* Select one empty transmit mailbox */
;;;582      if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
000006  6893              LDR      r3,[r2,#8]
000008  f0036380          AND      r3,r3,#0x4000000
00000c  f1b36f80          CMP      r3,#0x4000000
000010  d100              BNE      |L22.20|
;;;583      {
;;;584        transmit_mailbox = 0;
000012  e010              B        |L22.54|
                  |L22.20|
;;;585      }
;;;586      else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
000014  6893              LDR      r3,[r2,#8]
000016  f0036300          AND      r3,r3,#0x8000000
00001a  f1b36f00          CMP      r3,#0x8000000
00001e  d101              BNE      |L22.36|
;;;587      {
;;;588        transmit_mailbox = 1;
000020  2001              MOVS     r0,#1
000022  e008              B        |L22.54|
                  |L22.36|
;;;589      }
;;;590      else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
000024  6893              LDR      r3,[r2,#8]
000026  f0035380          AND      r3,r3,#0x10000000
00002a  f1b35f80          CMP      r3,#0x10000000
00002e  d101              BNE      |L22.52|
;;;591      {
;;;592        transmit_mailbox = 2;
000030  2002              MOVS     r0,#2
000032  e000              B        |L22.54|
                  |L22.52|
;;;593      }
;;;594      else
;;;595      {
;;;596        transmit_mailbox = CAN_TxStatus_NoMailBox;
000034  2004              MOVS     r0,#4
                  |L22.54|
;;;597      }
;;;598    
;;;599      if (transmit_mailbox != CAN_TxStatus_NoMailBox)
000036  2804              CMP      r0,#4
000038  d074              BEQ      |L22.292|
;;;600      {
;;;601        /* Set up the Id */
;;;602        CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ;
00003a  f50273c0          ADD      r3,r2,#0x180
00003e  eb031300          ADD      r3,r3,r0,LSL #4
000042  681b              LDR      r3,[r3,#0]
000044  f0030401          AND      r4,r3,#1
000048  f50273c0          ADD      r3,r2,#0x180
00004c  eb031300          ADD      r3,r3,r0,LSL #4
000050  601c              STR      r4,[r3,#0]
;;;603        if (TxMessage->IDE == CAN_Id_Standard)
000052  7a0b              LDRB     r3,[r1,#8]
000054  b97b              CBNZ     r3,|L22.118|
;;;604        {
;;;605          assert_param(IS_CAN_STDID(TxMessage->StdId));  
;;;606          CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | \
000056  7a4b              LDRB     r3,[r1,#9]
000058  680c              LDR      r4,[r1,#0]
00005a  ea435344          ORR      r3,r3,r4,LSL #21
00005e  f50274c0          ADD      r4,r2,#0x180
000062  eb041400          ADD      r4,r4,r0,LSL #4
000066  6824              LDR      r4,[r4,#0]
000068  4323              ORRS     r3,r3,r4
00006a  f50274c0          ADD      r4,r2,#0x180
00006e  eb041400          ADD      r4,r4,r0,LSL #4
000072  6023              STR      r3,[r4,#0]
000074  e010              B        |L22.152|
                  |L22.118|
;;;607                                                      TxMessage->RTR);
;;;608        }
;;;609        else
;;;610        {
;;;611          assert_param(IS_CAN_EXTID(TxMessage->ExtId));
;;;612          CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId << 3) | \
000076  7a0b              LDRB     r3,[r1,#8]
000078  684c              LDR      r4,[r1,#4]
00007a  ea4303c4          ORR      r3,r3,r4,LSL #3
00007e  7a4c              LDRB     r4,[r1,#9]
000080  4323              ORRS     r3,r3,r4
000082  f50274c0          ADD      r4,r2,#0x180
000086  eb041400          ADD      r4,r4,r0,LSL #4
00008a  6824              LDR      r4,[r4,#0]
00008c  4323              ORRS     r3,r3,r4
00008e  f50274c0          ADD      r4,r2,#0x180
000092  eb041400          ADD      r4,r4,r0,LSL #4
000096  6023              STR      r3,[r4,#0]
                  |L22.152|
;;;613                                                      TxMessage->IDE | \
;;;614                                                      TxMessage->RTR);
;;;615        }
;;;616        
;;;617        /* Set up the DLC */
;;;618        TxMessage->DLC &= (uint8_t)0x0000000F;
000098  7a8b              LDRB     r3,[r1,#0xa]
00009a  f003030f          AND      r3,r3,#0xf
00009e  728b              STRB     r3,[r1,#0xa]
;;;619        CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0;
0000a0  f50273c0          ADD      r3,r2,#0x180
0000a4  eb031300          ADD      r3,r3,r0,LSL #4
0000a8  685b              LDR      r3,[r3,#4]
0000aa  f023040f          BIC      r4,r3,#0xf
0000ae  f50273c0          ADD      r3,r2,#0x180
0000b2  eb031300          ADD      r3,r3,r0,LSL #4
0000b6  605c              STR      r4,[r3,#4]
;;;620        CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC;
0000b8  f50273c0          ADD      r3,r2,#0x180
0000bc  eb031300          ADD      r3,r3,r0,LSL #4
0000c0  685b              LDR      r3,[r3,#4]
0000c2  7a8c              LDRB     r4,[r1,#0xa]
0000c4  4323              ORRS     r3,r3,r4
0000c6  f50274c0          ADD      r4,r2,#0x180
0000ca  eb041400          ADD      r4,r4,r0,LSL #4
0000ce  6063              STR      r3,[r4,#4]
;;;621    
;;;622        /* Set up the data field */
;;;623        CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) | 
0000d0  7b8b              LDRB     r3,[r1,#0xe]
0000d2  061c              LSLS     r4,r3,#24
0000d4  7b4b              LDRB     r3,[r1,#0xd]
0000d6  ea444403          ORR      r4,r4,r3,LSL #16
0000da  7b0b              LDRB     r3,[r1,#0xc]
0000dc  ea442303          ORR      r3,r4,r3,LSL #8
0000e0  7acc              LDRB     r4,[r1,#0xb]
0000e2  4323              ORRS     r3,r3,r4
0000e4  f50274c0          ADD      r4,r2,#0x180
0000e8  eb041400          ADD      r4,r4,r0,LSL #4
0000ec  60a3              STR      r3,[r4,#8]
;;;624                                                 ((uint32_t)TxMessage->Data[2] << 16) |
;;;625                                                 ((uint32_t)TxMessage->Data[1] << 8) | 
;;;626                                                 ((uint32_t)TxMessage->Data[0]));
;;;627        CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) | 
0000ee  7c8b              LDRB     r3,[r1,#0x12]
0000f0  061c              LSLS     r4,r3,#24
0000f2  7c4b              LDRB     r3,[r1,#0x11]
0000f4  ea444403          ORR      r4,r4,r3,LSL #16
0000f8  7c0b              LDRB     r3,[r1,#0x10]
0000fa  ea442303          ORR      r3,r4,r3,LSL #8
0000fe  7bcc              LDRB     r4,[r1,#0xf]
000100  4323              ORRS     r3,r3,r4
000102  f50274c0          ADD      r4,r2,#0x180
000106  eb041400          ADD      r4,r4,r0,LSL #4
00010a  60e3              STR      r3,[r4,#0xc]
;;;628                                                 ((uint32_t)TxMessage->Data[6] << 16) |
;;;629                                                 ((uint32_t)TxMessage->Data[5] << 8) |
;;;630                                                 ((uint32_t)TxMessage->Data[4]));
;;;631        /* Request transmission */
;;;632        CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ;
00010c  f50273c0          ADD      r3,r2,#0x180
000110  eb031300          ADD      r3,r3,r0,LSL #4
000114  681b              LDR      r3,[r3,#0]
000116  f0430401          ORR      r4,r3,#1
00011a  f50273c0          ADD      r3,r2,#0x180
00011e  eb031300          ADD      r3,r3,r0,LSL #4
000122  601c              STR      r4,[r3,#0]
                  |L22.292|
;;;633      }
;;;634      return transmit_mailbox;
;;;635    }
000124  bd10              POP      {r4,pc}
;;;636    
                          ENDP


                          AREA ||i.CAN_TransmitStatus||, CODE, READONLY, ALIGN=2

                  CAN_TransmitStatus PROC
;;;643      */
;;;644    uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox)
000000  b510              PUSH     {r4,lr}
;;;645    {
000002  4602              MOV      r2,r0
;;;646      uint32_t state = 0;
000004  2300              MOVS     r3,#0
;;;647    
;;;648      /* Check the parameters */
;;;649      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;650      assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox));
;;;651     
;;;652      switch (TransmitMailbox)
000006  b121              CBZ      r1,|L23.18|
000008  2901              CMP      r1,#1
00000a  d007              BEQ      |L23.28|
00000c  2902              CMP      r1,#2
00000e  d10f              BNE      |L23.48|
000010  e009              B        |L23.38|
                  |L23.18|
;;;653      {
;;;654        case (CAN_TXMAILBOX_0): 
;;;655          state =   CANx->TSR &  (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0);
000012  6890              LDR      r0,[r2,#8]
000014  4c1d              LDR      r4,|L23.140|
000016  ea000304          AND      r3,r0,r4
;;;656          break;
00001a  e00b              B        |L23.52|
                  |L23.28|
;;;657        case (CAN_TXMAILBOX_1): 
;;;658          state =   CANx->TSR &  (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1);
00001c  6890              LDR      r0,[r2,#8]
00001e  4c1c              LDR      r4,|L23.144|
000020  ea000304          AND      r3,r0,r4
;;;659          break;
000024  e006              B        |L23.52|
                  |L23.38|
;;;660        case (CAN_TXMAILBOX_2): 
;;;661          state =   CANx->TSR &  (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2);
000026  6890              LDR      r0,[r2,#8]
000028  4c1a              LDR      r4,|L23.148|
00002a  ea000304          AND      r3,r0,r4
;;;662          break;
00002e  e001              B        |L23.52|
                  |L23.48|
;;;663        default:
;;;664          state = CAN_TxStatus_Failed;
000030  2300              MOVS     r3,#0
;;;665          break;
000032  bf00              NOP      
                  |L23.52|
000034  bf00              NOP                            ;656
;;;666      }
;;;667      switch (state)
000036  4c18              LDR      r4,|L23.152|
000038  1b18              SUBS     r0,r3,r4
00003a  42a3              CMP      r3,r4
00003c  d016              BEQ      |L23.108|
00003e  dc07              BGT      |L23.80|
000040  b183              CBZ      r3,|L23.100|
000042  f06f6080          MVN      r0,#0x4000000
000046  1818              ADDS     r0,r3,r0
000048  d00e              BEQ      |L23.104|
00004a  2802              CMP      r0,#2
00004c  d118              BNE      |L23.128|
00004e  e011              B        |L23.116|
                  |L23.80|
000050  f5b07f00          CMP      r0,#0x200
000054  d010              BEQ      |L23.120|
000056  4c11              LDR      r4,|L23.156|
000058  1900              ADDS     r0,r0,r4
00005a  d009              BEQ      |L23.112|
00005c  f5b03f00          CMP      r0,#0x20000
000060  d10e              BNE      |L23.128|
000062  e00b              B        |L23.124|
                  |L23.100|
;;;668      {
;;;669          /* transmit pending  */
;;;670        case (0x0): state = CAN_TxStatus_Pending;
000064  2302              MOVS     r3,#2
;;;671          break;
000066  e00d              B        |L23.132|
                  |L23.104|
;;;672          /* transmit failed  */
;;;673         case (CAN_TSR_RQCP0 | CAN_TSR_TME0): state = CAN_TxStatus_Failed;
000068  2300              MOVS     r3,#0
;;;674          break;
00006a  e00b              B        |L23.132|
                  |L23.108|
;;;675         case (CAN_TSR_RQCP1 | CAN_TSR_TME1): state = CAN_TxStatus_Failed;
00006c  2300              MOVS     r3,#0
;;;676          break;
00006e  e009              B        |L23.132|
                  |L23.112|
;;;677         case (CAN_TSR_RQCP2 | CAN_TSR_TME2): state = CAN_TxStatus_Failed;
000070  2300              MOVS     r3,#0
;;;678          break;
000072  e007              B        |L23.132|
                  |L23.116|
;;;679          /* transmit succeeded  */
;;;680        case (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0):state = CAN_TxStatus_Ok;
000074  2301              MOVS     r3,#1
;;;681          break;
000076  e005              B        |L23.132|
                  |L23.120|
;;;682        case (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1):state = CAN_TxStatus_Ok;
000078  2301              MOVS     r3,#1
;;;683          break;
00007a  e003              B        |L23.132|
                  |L23.124|
;;;684        case (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2):state = CAN_TxStatus_Ok;
00007c  2301              MOVS     r3,#1
;;;685          break;
00007e  e001              B        |L23.132|
                  |L23.128|
;;;686        default: state = CAN_TxStatus_Failed;
000080  2300              MOVS     r3,#0
;;;687          break;
000082  bf00              NOP      
                  |L23.132|
000084  bf00              NOP                            ;671
;;;688      }
;;;689      return (uint8_t) state;
000086  b2d8              UXTB     r0,r3
;;;690    }
000088  bd10              POP      {r4,pc}
;;;691    
                          ENDP

00008a  0000              DCW      0x0000
                  |L23.140|
                          DCD      0x04000003
                  |L23.144|
                          DCD      0x08000300
                  |L23.148|
                          DCD      0x10030000
                  |L23.152|
                          DCD      0x08000100
                  |L23.156|
                          DCD      0xf7ff0100

                          AREA ||i.CAN_WakeUp||, CODE, READONLY, ALIGN=1

                  CAN_WakeUp PROC
;;;972      */
;;;973    uint8_t CAN_WakeUp(CAN_TypeDef* CANx)
000000  4601              MOV      r1,r0
;;;974    {
;;;975      uint32_t wait_slak = SLAK_TIMEOUT;
000002  f64f72ff          MOV      r2,#0xffff
;;;976      uint8_t wakeupstatus = CAN_WakeUp_Failed;
000006  2000              MOVS     r0,#0
;;;977      
;;;978      /* Check the parameters */
;;;979      assert_param(IS_CAN_ALL_PERIPH(CANx));
;;;980        
;;;981      /* Wake up request */
;;;982      CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
000008  680b              LDR      r3,[r1,#0]
00000a  f0230302          BIC      r3,r3,#2
00000e  600b              STR      r3,[r1,#0]
;;;983        
;;;984      /* Sleep mode status */
;;;985      while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00))
000010  e000              B        |L24.20|
                  |L24.18|
;;;986      {
;;;987       wait_slak--;
000012  1e52              SUBS     r2,r2,#1
                  |L24.20|
000014  684b              LDR      r3,[r1,#4]            ;985
000016  f0030302          AND      r3,r3,#2              ;985
00001a  2b02              CMP      r3,#2                 ;985
00001c  d101              BNE      |L24.34|
00001e  2a00              CMP      r2,#0                 ;985
000020  d1f7              BNE      |L24.18|
                  |L24.34|
;;;988      }
;;;989      if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK)
000022  684b              LDR      r3,[r1,#4]
000024  f0030302          AND      r3,r3,#2
000028  2b02              CMP      r3,#2
00002a  d000              BEQ      |L24.46|
;;;990      {
;;;991       /* wake up done : Sleep mode exited */
;;;992        wakeupstatus = CAN_WakeUp_Ok;
00002c  2001              MOVS     r0,#1
                  |L24.46|
;;;993      }
;;;994      /* return wakeup status */
;;;995      return (uint8_t)wakeupstatus;
;;;996    }
00002e  4770              BX       lr
;;;997    /**
                          ENDP


                          AREA ||i.CheckITStatus||, CODE, READONLY, ALIGN=1

                  CheckITStatus PROC
;;;1668     */
;;;1669   static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit)
000000  4602              MOV      r2,r0
;;;1670   {
;;;1671     ITStatus pendingbitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;1672     
;;;1673     if ((CAN_Reg & It_Bit) != (uint32_t)RESET)
000004  420a              TST      r2,r1
000006  d001              BEQ      |L25.12|
;;;1674     {
;;;1675       /* CAN_IT is set */
;;;1676       pendingbitstatus = SET;
000008  2001              MOVS     r0,#1
00000a  e000              B        |L25.14|
                  |L25.12|
;;;1677     }
;;;1678     else
;;;1679     {
;;;1680       /* CAN_IT is reset */
;;;1681       pendingbitstatus = RESET;
00000c  2000              MOVS     r0,#0
                  |L25.14|
;;;1682     }
;;;1683     return pendingbitstatus;
;;;1684   }
00000e  4770              BX       lr
;;;1685   
                          ENDP


;*** Start embedded assembler ***

#line 1 "..\\..\\..\\Libraries\\STM32F4xx_StdPeriph_Driver\\src\\stm32f4xx_can.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___15_stm32f4xx_can_c_347dae01____REV16|
#line 114 "C:\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___15_stm32f4xx_can_c_347dae01____REV16| PROC
#line 115

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___15_stm32f4xx_can_c_347dae01____REVSH|
#line 128
|__asm___15_stm32f4xx_can_c_347dae01____REVSH| PROC
#line 129

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
