; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\STM324xG_EVAL\stm32f4xx_adc.o --asm_dir=.\STM324xG_EVAL\ --list_dir=.\STM324xG_EVAL\ --depend=.\STM324xG_EVAL\stm32f4xx_adc.d --cpu=Cortex-M4.fp --apcs=interwork -O0 -Otime -I..\ -I..\..\..\Libraries\CMSIS\Device\ST\STM32F4xx\Include -I..\..\..\Libraries\STM32F4xx_StdPeriph_Driver\inc -I..\..\..\Utilities\STM32_EVAL\Common -I..\..\..\Utilities\STM32_EVAL\STM3240_41_G_EVAL -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\Inc\ST\STM32F4xx -D__MICROLIB -DUSE_STM324xG_EVAL -DSTM32F4XX -DUSE_STDPERIPH_DRIVER --omf_browse=.\STM324xG_EVAL\stm32f4xx_adc.crf ..\..\..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_adc.c]
                          THUMB

                          AREA ||i.ADC_AnalogWatchdogCmd||, CODE, READONLY, ALIGN=2

                  ADC_AnalogWatchdogCmd PROC
;;;449      */
;;;450    void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog)
000000  460a              MOV      r2,r1
;;;451    {
;;;452      uint32_t tmpreg = 0;
000002  2100              MOVS     r1,#0
;;;453      /* Check the parameters */
;;;454      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;455      assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog));
;;;456      
;;;457      /* Get the old register value */
;;;458      tmpreg = ADCx->CR1;
000004  6841              LDR      r1,[r0,#4]
;;;459      
;;;460      /* Clear AWDEN, JAWDEN and AWDSGL bits */
;;;461      tmpreg &= CR1_AWDMode_RESET;
000006  4b02              LDR      r3,|L1.16|
000008  4019              ANDS     r1,r1,r3
;;;462      
;;;463      /* Set the analog watchdog enable mode */
;;;464      tmpreg |= ADC_AnalogWatchdog;
00000a  4311              ORRS     r1,r1,r2
;;;465      
;;;466      /* Store the new register value */
;;;467      ADCx->CR1 = tmpreg;
00000c  6041              STR      r1,[r0,#4]
;;;468    }
00000e  4770              BX       lr
;;;469    
                          ENDP

                  |L1.16|
                          DCD      0xff3ffdff

                          AREA ||i.ADC_AnalogWatchdogSingleChannelConfig||, CODE, READONLY, ALIGN=1

                  ADC_AnalogWatchdogSingleChannelConfig PROC
;;;519      */
;;;520    void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
000000  460a              MOV      r2,r1
;;;521    {
;;;522      uint32_t tmpreg = 0;
000002  2100              MOVS     r1,#0
;;;523      /* Check the parameters */
;;;524      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;525      assert_param(IS_ADC_CHANNEL(ADC_Channel));
;;;526      
;;;527      /* Get the old register value */
;;;528      tmpreg = ADCx->CR1;
000004  6841              LDR      r1,[r0,#4]
;;;529      
;;;530      /* Clear the Analog watchdog channel select bits */
;;;531      tmpreg &= CR1_AWDCH_RESET;
000006  f021011f          BIC      r1,r1,#0x1f
;;;532      
;;;533      /* Set the Analog watchdog channel */
;;;534      tmpreg |= ADC_Channel;
00000a  4311              ORRS     r1,r1,r2
;;;535      
;;;536      /* Store the new register value */
;;;537      ADCx->CR1 = tmpreg;
00000c  6041              STR      r1,[r0,#4]
;;;538    }
00000e  4770              BX       lr
;;;539    /**
                          ENDP


                          AREA ||i.ADC_AnalogWatchdogThresholdsConfig||, CODE, READONLY, ALIGN=1

                  ADC_AnalogWatchdogThresholdsConfig PROC
;;;478      */
;;;479    void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
000000  6241              STR      r1,[r0,#0x24]
;;;480                                            uint16_t LowThreshold)
;;;481    {
;;;482      /* Check the parameters */
;;;483      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;484      assert_param(IS_ADC_THRESHOLD(HighThreshold));
;;;485      assert_param(IS_ADC_THRESHOLD(LowThreshold));
;;;486      
;;;487      /* Set the ADCx high threshold */
;;;488      ADCx->HTR = HighThreshold;
;;;489      
;;;490      /* Set the ADCx low threshold */
;;;491      ADCx->LTR = LowThreshold;
000002  6282              STR      r2,[r0,#0x28]
;;;492    }
000004  4770              BX       lr
;;;493    
                          ENDP


                          AREA ||i.ADC_AutoInjectedConvCmd||, CODE, READONLY, ALIGN=1

                  ADC_AutoInjectedConvCmd PROC
;;;1418     */
;;;1419   void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  b121              CBZ      r1,|L4.12|
;;;1420   {
;;;1421     /* Check the parameters */
;;;1422     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1423     assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;1424     if (NewState != DISABLE)
;;;1425     {
;;;1426       /* Enable the selected ADC automatic injected group conversion */
;;;1427       ADCx->CR1 |= (uint32_t)ADC_CR1_JAUTO;
000002  6842              LDR      r2,[r0,#4]
000004  f4426280          ORR      r2,r2,#0x400
000008  6042              STR      r2,[r0,#4]
00000a  e003              B        |L4.20|
                  |L4.12|
;;;1428     }
;;;1429     else
;;;1430     {
;;;1431       /* Disable the selected ADC automatic injected group conversion */
;;;1432       ADCx->CR1 &= (uint32_t)(~ADC_CR1_JAUTO);
00000c  6842              LDR      r2,[r0,#4]
00000e  f4226280          BIC      r2,r2,#0x400
000012  6042              STR      r2,[r0,#4]
                  |L4.20|
;;;1433     }
;;;1434   }
000014  4770              BX       lr
;;;1435   
                          ENDP


                          AREA ||i.ADC_ClearFlag||, CODE, READONLY, ALIGN=1

                  ADC_ClearFlag PROC
;;;1652     */
;;;1653   void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
000000  43ca              MVNS     r2,r1
;;;1654   {
;;;1655     /* Check the parameters */
;;;1656     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1657     assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
;;;1658   
;;;1659     /* Clear the selected ADC flags */
;;;1660     ADCx->SR = ~(uint32_t)ADC_FLAG;
000002  6002              STR      r2,[r0,#0]
;;;1661   }
000004  4770              BX       lr
;;;1662   
                          ENDP


                          AREA ||i.ADC_ClearITPendingBit||, CODE, READONLY, ALIGN=1

                  ADC_ClearITPendingBit PROC
;;;1714     */
;;;1715   void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT)
000000  2200              MOVS     r2,#0
;;;1716   {
;;;1717     uint8_t itmask = 0;
;;;1718     /* Check the parameters */
;;;1719     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1720     assert_param(IS_ADC_IT(ADC_IT)); 
;;;1721     /* Get the ADC IT index */
;;;1722     itmask = (uint8_t)(ADC_IT >> 8);
000002  120a              ASRS     r2,r1,#8
;;;1723     /* Clear the selected ADC interrupt pending bits */
;;;1724     ADCx->SR = ~(uint32_t)itmask;
000004  43d3              MVNS     r3,r2
000006  6003              STR      r3,[r0,#0]
;;;1725   }                    
000008  4770              BX       lr
;;;1726   /**
                          ENDP


                          AREA ||i.ADC_Cmd||, CODE, READONLY, ALIGN=1

                  ADC_Cmd PROC
;;;391      */
;;;392    void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  b121              CBZ      r1,|L7.12|
;;;393    {
;;;394      /* Check the parameters */
;;;395      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;396      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;397      if (NewState != DISABLE)
;;;398      {
;;;399        /* Set the ADON bit to wake up the ADC from power down mode */
;;;400        ADCx->CR2 |= (uint32_t)ADC_CR2_ADON;
000002  6882              LDR      r2,[r0,#8]
000004  f0420201          ORR      r2,r2,#1
000008  6082              STR      r2,[r0,#8]
00000a  e003              B        |L7.20|
                  |L7.12|
;;;401      }
;;;402      else
;;;403      {
;;;404        /* Disable the selected ADC peripheral */
;;;405        ADCx->CR2 &= (uint32_t)(~ADC_CR2_ADON);
00000c  6882              LDR      r2,[r0,#8]
00000e  f0220201          BIC      r2,r2,#1
000012  6082              STR      r2,[r0,#8]
                  |L7.20|
;;;406      }
;;;407    }
000014  4770              BX       lr
;;;408    /**
                          ENDP


                          AREA ||i.ADC_CommonInit||, CODE, READONLY, ALIGN=2

                  ADC_CommonInit PROC
;;;333      */
;;;334    void ADC_CommonInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct)
000000  2100              MOVS     r1,#0
;;;335    {
;;;336      uint32_t tmpreg1 = 0;
;;;337      /* Check the parameters */
;;;338      assert_param(IS_ADC_MODE(ADC_CommonInitStruct->ADC_Mode));
;;;339      assert_param(IS_ADC_PRESCALER(ADC_CommonInitStruct->ADC_Prescaler));
;;;340      assert_param(IS_ADC_DMA_ACCESS_MODE(ADC_CommonInitStruct->ADC_DMAAccessMode));
;;;341      assert_param(IS_ADC_SAMPLING_DELAY(ADC_CommonInitStruct->ADC_TwoSamplingDelay));
;;;342      /*---------------------------- ADC CCR Configuration -----------------*/
;;;343      /* Get the ADC CCR value */
;;;344      tmpreg1 = ADC->CCR;
000002  4a0a              LDR      r2,|L8.44|
000004  6811              LDR      r1,[r2,#0]
;;;345      
;;;346      /* Clear MULTI, DELAY, DMA and ADCPRE bits */
;;;347      tmpreg1 &= CR_CLEAR_MASK;
000006  4a0a              LDR      r2,|L8.48|
000008  ea010102          AND      r1,r1,r2
;;;348      
;;;349      /* Configure ADCx: Multi mode, Delay between two sampling time, ADC prescaler,
;;;350         and DMA access mode for multimode */
;;;351      /* Set MULTI bits according to ADC_Mode value */
;;;352      /* Set ADCPRE bits according to ADC_Prescaler value */
;;;353      /* Set DMA bits according to ADC_DMAAccessMode value */
;;;354      /* Set DELAY bits according to ADC_TwoSamplingDelay value */    
;;;355      tmpreg1 |= (uint32_t)(ADC_CommonInitStruct->ADC_Mode | 
00000c  e9d02300          LDRD     r2,r3,[r0,#0]
000010  ea420203          ORR      r2,r2,r3
000014  6883              LDR      r3,[r0,#8]
000016  ea420203          ORR      r2,r2,r3
00001a  68c3              LDR      r3,[r0,#0xc]
00001c  ea420203          ORR      r2,r2,r3
000020  ea420101          ORR      r1,r2,r1
;;;356                            ADC_CommonInitStruct->ADC_Prescaler | 
;;;357                            ADC_CommonInitStruct->ADC_DMAAccessMode | 
;;;358                            ADC_CommonInitStruct->ADC_TwoSamplingDelay);
;;;359                            
;;;360      /* Write to ADC CCR */
;;;361      ADC->CCR = tmpreg1;
000024  4a03              LDR      r2,|L8.52|
000026  f8c21304          STR      r1,[r2,#0x304]
;;;362    }
00002a  4770              BX       lr
;;;363    
                          ENDP

                  |L8.44|
                          DCD      0x40012304
                  |L8.48|
                          DCD      0xfffc30e0
                  |L8.52|
                          DCD      0x40012000

                          AREA ||i.ADC_CommonStructInit||, CODE, READONLY, ALIGN=1

                  ADC_CommonStructInit PROC
;;;369      */
;;;370    void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct)
000000  2100              MOVS     r1,#0
;;;371    {
;;;372      /* Initialize the ADC_Mode member */
;;;373      ADC_CommonInitStruct->ADC_Mode = ADC_Mode_Independent;
000002  6001              STR      r1,[r0,#0]
;;;374    
;;;375      /* initialize the ADC_Prescaler member */
;;;376      ADC_CommonInitStruct->ADC_Prescaler = ADC_Prescaler_Div2;
000004  6041              STR      r1,[r0,#4]
;;;377    
;;;378      /* Initialize the ADC_DMAAccessMode member */
;;;379      ADC_CommonInitStruct->ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
000006  6081              STR      r1,[r0,#8]
;;;380    
;;;381      /* Initialize the ADC_TwoSamplingDelay member */
;;;382      ADC_CommonInitStruct->ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
000008  60c1              STR      r1,[r0,#0xc]
;;;383    }
00000a  4770              BX       lr
;;;384    
                          ENDP


                          AREA ||i.ADC_ContinuousModeCmd||, CODE, READONLY, ALIGN=1

                  ADC_ContinuousModeCmd PROC
;;;896      */
;;;897    void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  b121              CBZ      r1,|L10.12|
;;;898    {
;;;899      /* Check the parameters */
;;;900      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;901      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;902      
;;;903      if (NewState != DISABLE)
;;;904      {
;;;905        /* Enable the selected ADC continuous conversion mode */
;;;906        ADCx->CR2 |= (uint32_t)ADC_CR2_CONT;
000002  6882              LDR      r2,[r0,#8]
000004  f0420202          ORR      r2,r2,#2
000008  6082              STR      r2,[r0,#8]
00000a  e003              B        |L10.20|
                  |L10.12|
;;;907      }
;;;908      else
;;;909      {
;;;910        /* Disable the selected ADC continuous conversion mode */
;;;911        ADCx->CR2 &= (uint32_t)(~ADC_CR2_CONT);
00000c  6882              LDR      r2,[r0,#8]
00000e  f0220202          BIC      r2,r2,#2
000012  6082              STR      r2,[r0,#8]
                  |L10.20|
;;;912      }
;;;913    }
000014  4770              BX       lr
;;;914    
                          ENDP


                          AREA ||i.ADC_DMACmd||, CODE, READONLY, ALIGN=1

                  ADC_DMACmd PROC
;;;1047     */
;;;1048   void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  b121              CBZ      r1,|L11.12|
;;;1049   {
;;;1050     /* Check the parameters */
;;;1051     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1052     assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;1053     if (NewState != DISABLE)
;;;1054     {
;;;1055       /* Enable the selected ADC DMA request */
;;;1056       ADCx->CR2 |= (uint32_t)ADC_CR2_DMA;
000002  6882              LDR      r2,[r0,#8]
000004  f4427280          ORR      r2,r2,#0x100
000008  6082              STR      r2,[r0,#8]
00000a  e003              B        |L11.20|
                  |L11.12|
;;;1057     }
;;;1058     else
;;;1059     {
;;;1060       /* Disable the selected ADC DMA request */
;;;1061       ADCx->CR2 &= (uint32_t)(~ADC_CR2_DMA);
00000c  6882              LDR      r2,[r0,#8]
00000e  f4227280          BIC      r2,r2,#0x100
000012  6082              STR      r2,[r0,#8]
                  |L11.20|
;;;1062     }
;;;1063   }
000014  4770              BX       lr
;;;1064   
                          ENDP


                          AREA ||i.ADC_DMARequestAfterLastTransferCmd||, CODE, READONLY, ALIGN=1

                  ADC_DMARequestAfterLastTransferCmd PROC
;;;1071     */
;;;1072   void ADC_DMARequestAfterLastTransferCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  b121              CBZ      r1,|L12.12|
;;;1073   {
;;;1074     /* Check the parameters */
;;;1075     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1076     assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;1077     if (NewState != DISABLE)
;;;1078     {
;;;1079       /* Enable the selected ADC DMA request after last transfer */
;;;1080       ADCx->CR2 |= (uint32_t)ADC_CR2_DDS;
000002  6882              LDR      r2,[r0,#8]
000004  f4427200          ORR      r2,r2,#0x200
000008  6082              STR      r2,[r0,#8]
00000a  e003              B        |L12.20|
                  |L12.12|
;;;1081     }
;;;1082     else
;;;1083     {
;;;1084       /* Disable the selected ADC DMA request after last transfer */
;;;1085       ADCx->CR2 &= (uint32_t)(~ADC_CR2_DDS);
00000c  6882              LDR      r2,[r0,#8]
00000e  f4227200          BIC      r2,r2,#0x200
000012  6082              STR      r2,[r0,#8]
                  |L12.20|
;;;1086     }
;;;1087   }
000014  4770              BX       lr
;;;1088   
                          ENDP


                          AREA ||i.ADC_DeInit||, CODE, READONLY, ALIGN=1

                  ADC_DeInit PROC
;;;205      */
;;;206    void ADC_DeInit(void)
000000  b510              PUSH     {r4,lr}
;;;207    {
;;;208      /* Enable all ADCs reset state */
;;;209      RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC, ENABLE);
000002  2101              MOVS     r1,#1
000004  0208              LSLS     r0,r1,#8
000006  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;210      
;;;211      /* Release all ADCs from reset state */
;;;212      RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC, DISABLE);
00000a  2100              MOVS     r1,#0
00000c  f44f7080          MOV      r0,#0x100
000010  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;213    }
000014  bd10              POP      {r4,pc}
;;;214    
                          ENDP


                          AREA ||i.ADC_DiscModeChannelCountConfig||, CODE, READONLY, ALIGN=1

                  ADC_DiscModeChannelCountConfig PROC
;;;922      */
;;;923    void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number)
000000  b510              PUSH     {r4,lr}
;;;924    {
000002  460a              MOV      r2,r1
;;;925      uint32_t tmpreg1 = 0;
000004  2100              MOVS     r1,#0
;;;926      uint32_t tmpreg2 = 0;
000006  2300              MOVS     r3,#0
;;;927      
;;;928      /* Check the parameters */
;;;929      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;930      assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
;;;931      
;;;932      /* Get the old register value */
;;;933      tmpreg1 = ADCx->CR1;
000008  6841              LDR      r1,[r0,#4]
;;;934      
;;;935      /* Clear the old discontinuous mode channel count */
;;;936      tmpreg1 &= CR1_DISCNUM_RESET;
00000a  f4214160          BIC      r1,r1,#0xe000
;;;937      
;;;938      /* Set the discontinuous mode channel count */
;;;939      tmpreg2 = Number - 1;
00000e  1e53              SUBS     r3,r2,#1
;;;940      tmpreg1 |= tmpreg2 << 13;
000010  ea413143          ORR      r1,r1,r3,LSL #13
;;;941      
;;;942      /* Store the new register value */
;;;943      ADCx->CR1 = tmpreg1;
000014  6041              STR      r1,[r0,#4]
;;;944    }
000016  bd10              POP      {r4,pc}
;;;945    
                          ENDP


                          AREA ||i.ADC_DiscModeCmd||, CODE, READONLY, ALIGN=1

                  ADC_DiscModeCmd PROC
;;;954      */
;;;955    void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  b121              CBZ      r1,|L15.12|
;;;956    {
;;;957      /* Check the parameters */
;;;958      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;959      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;960      
;;;961      if (NewState != DISABLE)
;;;962      {
;;;963        /* Enable the selected ADC regular discontinuous mode */
;;;964        ADCx->CR1 |= (uint32_t)ADC_CR1_DISCEN;
000002  6842              LDR      r2,[r0,#4]
000004  f4426200          ORR      r2,r2,#0x800
000008  6042              STR      r2,[r0,#4]
00000a  e003              B        |L15.20|
                  |L15.12|
;;;965      }
;;;966      else
;;;967      {
;;;968        /* Disable the selected ADC regular discontinuous mode */
;;;969        ADCx->CR1 &= (uint32_t)(~ADC_CR1_DISCEN);
00000c  6842              LDR      r2,[r0,#4]
00000e  f4226200          BIC      r2,r2,#0x800
000012  6042              STR      r2,[r0,#4]
                  |L15.20|
;;;970      }
;;;971    }
000014  4770              BX       lr
;;;972    
                          ENDP


                          AREA ||i.ADC_EOCOnEachRegularChannelCmd||, CODE, READONLY, ALIGN=1

                  ADC_EOCOnEachRegularChannelCmd PROC
;;;871      */
;;;872    void ADC_EOCOnEachRegularChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  b121              CBZ      r1,|L16.12|
;;;873    {
;;;874      /* Check the parameters */
;;;875      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;876      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;877      
;;;878      if (NewState != DISABLE)
;;;879      {
;;;880        /* Enable the selected ADC EOC rising on each regular channel conversion */
;;;881        ADCx->CR2 |= (uint32_t)ADC_CR2_EOCS;
000002  6882              LDR      r2,[r0,#8]
000004  f4426280          ORR      r2,r2,#0x400
000008  6082              STR      r2,[r0,#8]
00000a  e003              B        |L16.20|
                  |L16.12|
;;;882      }
;;;883      else
;;;884      {
;;;885        /* Disable the selected ADC EOC rising on each regular channel conversion */
;;;886        ADCx->CR2 &= (uint32_t)(~ADC_CR2_EOCS);
00000c  6882              LDR      r2,[r0,#8]
00000e  f4226280          BIC      r2,r2,#0x400
000012  6082              STR      r2,[r0,#8]
                  |L16.20|
;;;887      }
;;;888    }
000014  4770              BX       lr
;;;889    
                          ENDP


                          AREA ||i.ADC_ExternalTrigInjectedConvConfig||, CODE, READONLY, ALIGN=1

                  ADC_ExternalTrigInjectedConvConfig PROC
;;;1321     */
;;;1322   void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv)
000000  460a              MOV      r2,r1
;;;1323   {
;;;1324     uint32_t tmpreg = 0;
000002  2100              MOVS     r1,#0
;;;1325     /* Check the parameters */
;;;1326     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1327     assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv));
;;;1328     
;;;1329     /* Get the old register value */
;;;1330     tmpreg = ADCx->CR2;
000004  6881              LDR      r1,[r0,#8]
;;;1331     
;;;1332     /* Clear the old external event selection for injected group */
;;;1333     tmpreg &= CR2_JEXTSEL_RESET;
000006  f4212170          BIC      r1,r1,#0xf0000
;;;1334     
;;;1335     /* Set the external event selection for injected group */
;;;1336     tmpreg |= ADC_ExternalTrigInjecConv;
00000a  4311              ORRS     r1,r1,r2
;;;1337     
;;;1338     /* Store the new register value */
;;;1339     ADCx->CR2 = tmpreg;
00000c  6081              STR      r1,[r0,#8]
;;;1340   }
00000e  4770              BX       lr
;;;1341   
                          ENDP


                          AREA ||i.ADC_ExternalTrigInjectedConvEdgeConfig||, CODE, READONLY, ALIGN=1

                  ADC_ExternalTrigInjectedConvEdgeConfig PROC
;;;1355     */
;;;1356   void ADC_ExternalTrigInjectedConvEdgeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConvEdge)
000000  460a              MOV      r2,r1
;;;1357   {
;;;1358     uint32_t tmpreg = 0;
000002  2100              MOVS     r1,#0
;;;1359     /* Check the parameters */
;;;1360     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1361     assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(ADC_ExternalTrigInjecConvEdge));
;;;1362     /* Get the old register value */
;;;1363     tmpreg = ADCx->CR2;
000004  6881              LDR      r1,[r0,#8]
;;;1364     /* Clear the old external trigger edge for injected group */
;;;1365     tmpreg &= CR2_JEXTEN_RESET;
000006  f4211140          BIC      r1,r1,#0x300000
;;;1366     /* Set the new external trigger edge for injected group */
;;;1367     tmpreg |= ADC_ExternalTrigInjecConvEdge;
00000a  4311              ORRS     r1,r1,r2
;;;1368     /* Store the new register value */
;;;1369     ADCx->CR2 = tmpreg;
00000c  6081              STR      r1,[r0,#8]
;;;1370   }
00000e  4770              BX       lr
;;;1371   
                          ENDP


                          AREA ||i.ADC_GetConversionValue||, CODE, READONLY, ALIGN=1

                  ADC_GetConversionValue PROC
;;;977      */
;;;978    uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
000000  4601              MOV      r1,r0
;;;979    {
;;;980      /* Check the parameters */
;;;981      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;982      
;;;983      /* Return the selected ADC conversion value */
;;;984      return (uint16_t) ADCx->DR;
000002  6cc8              LDR      r0,[r1,#0x4c]
000004  b280              UXTH     r0,r0
;;;985    }
000006  4770              BX       lr
;;;986    
                          ENDP


                          AREA ||i.ADC_GetFlagStatus||, CODE, READONLY, ALIGN=1

                  ADC_GetFlagStatus PROC
;;;1617     */
;;;1618   FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
000000  4602              MOV      r2,r0
;;;1619   {
;;;1620     FlagStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;1621     /* Check the parameters */
;;;1622     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1623     assert_param(IS_ADC_GET_FLAG(ADC_FLAG));
;;;1624   
;;;1625     /* Check the status of the specified ADC flag */
;;;1626     if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET)
000004  6813              LDR      r3,[r2,#0]
000006  420b              TST      r3,r1
000008  d001              BEQ      |L20.14|
;;;1627     {
;;;1628       /* ADC_FLAG is set */
;;;1629       bitstatus = SET;
00000a  2001              MOVS     r0,#1
00000c  e000              B        |L20.16|
                  |L20.14|
;;;1630     }
;;;1631     else
;;;1632     {
;;;1633       /* ADC_FLAG is reset */
;;;1634       bitstatus = RESET;
00000e  2000              MOVS     r0,#0
                  |L20.16|
;;;1635     }
;;;1636     /* Return the ADC_FLAG status */
;;;1637     return  bitstatus;
;;;1638   }
000010  4770              BX       lr
;;;1639   
                          ENDP


                          AREA ||i.ADC_GetITStatus||, CODE, READONLY, ALIGN=1

                  ADC_GetITStatus PROC
;;;1673     */
;;;1674   ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT)
000000  b530              PUSH     {r4,r5,lr}
;;;1675   {
000002  4602              MOV      r2,r0
;;;1676     ITStatus bitstatus = RESET;
000004  2000              MOVS     r0,#0
;;;1677     uint32_t itmask = 0, enablestatus = 0;
000006  2300              MOVS     r3,#0
000008  4684              MOV      r12,r0
;;;1678   
;;;1679     /* Check the parameters */
;;;1680     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1681     assert_param(IS_ADC_IT(ADC_IT));
;;;1682   
;;;1683     /* Get the ADC IT index */
;;;1684     itmask = ADC_IT >> 8;
00000a  120b              ASRS     r3,r1,#8
;;;1685   
;;;1686     /* Get the ADC_IT enable bit status */
;;;1687     enablestatus = (ADCx->CR1 & ((uint32_t)0x01 << (uint8_t)ADC_IT)) ;
00000c  6854              LDR      r4,[r2,#4]
00000e  2501              MOVS     r5,#1
000010  408d              LSLS     r5,r5,r1
000012  ea040c05          AND      r12,r4,r5
;;;1688   
;;;1689     /* Check the status of the specified ADC interrupt */
;;;1690     if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus)
000016  6814              LDR      r4,[r2,#0]
000018  421c              TST      r4,r3
00001a  d004              BEQ      |L21.38|
00001c  f1bc0f00          CMP      r12,#0
000020  d001              BEQ      |L21.38|
;;;1691     {
;;;1692       /* ADC_IT is set */
;;;1693       bitstatus = SET;
000022  2001              MOVS     r0,#1
000024  e000              B        |L21.40|
                  |L21.38|
;;;1694     }
;;;1695     else
;;;1696     {
;;;1697       /* ADC_IT is reset */
;;;1698       bitstatus = RESET;
000026  2000              MOVS     r0,#0
                  |L21.40|
;;;1699     }
;;;1700     /* Return the ADC_IT status */
;;;1701     return  bitstatus;
;;;1702   }
000028  bd30              POP      {r4,r5,pc}
;;;1703   
                          ENDP


                          AREA ||i.ADC_GetInjectedConversionValue||, CODE, READONLY, ALIGN=1

                  ADC_GetInjectedConversionValue PROC
;;;1472     */
;;;1473   uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel)
000000  4602              MOV      r2,r0
;;;1474   {
;;;1475     __IO uint32_t tmp = 0;
000002  2300              MOVS     r3,#0
;;;1476     
;;;1477     /* Check the parameters */
;;;1478     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1479     assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
;;;1480   
;;;1481     tmp = (uint32_t)ADCx;
000004  4613              MOV      r3,r2
;;;1482     tmp += ADC_InjectedChannel + JDR_OFFSET;
000006  f1010028          ADD      r0,r1,#0x28
00000a  4403              ADD      r3,r3,r0
;;;1483     
;;;1484     /* Returns the selected injected channel conversion data value */
;;;1485     return (uint16_t) (*(__IO uint32_t*)  tmp); 
00000c  6818              LDR      r0,[r3,#0]
00000e  b280              UXTH     r0,r0
;;;1486   }
000010  4770              BX       lr
;;;1487   /**
                          ENDP


                          AREA ||i.ADC_GetMultiModeConversionValue||, CODE, READONLY, ALIGN=2

                  ADC_GetMultiModeConversionValue PROC
;;;998      */
;;;999    uint32_t ADC_GetMultiModeConversionValue(void)
000000  4801              LDR      r0,|L23.8|
;;;1000   {
;;;1001     /* Return the multi mode conversion value */
;;;1002     return (*(__IO uint32_t *) CDR_ADDRESS);
000002  6800              LDR      r0,[r0,#0]
;;;1003   }
000004  4770              BX       lr
;;;1004   /**
                          ENDP

000006  0000              DCW      0x0000
                  |L23.8|
                          DCD      0x40012308

                          AREA ||i.ADC_GetSoftwareStartConvStatus||, CODE, READONLY, ALIGN=1

                  ADC_GetSoftwareStartConvStatus PROC
;;;841      */
;;;842    FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx)
000000  4601              MOV      r1,r0
;;;843    {
;;;844      FlagStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;845      /* Check the parameters */
;;;846      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;847      
;;;848      /* Check the status of SWSTART bit */
;;;849      if ((ADCx->CR2 & ADC_CR2_JSWSTART) != (uint32_t)RESET)
000004  688a              LDR      r2,[r1,#8]
000006  f4120f80          TST      r2,#0x400000
00000a  d001              BEQ      |L24.16|
;;;850      {
;;;851        /* SWSTART bit is set */
;;;852        bitstatus = SET;
00000c  2001              MOVS     r0,#1
00000e  e000              B        |L24.18|
                  |L24.16|
;;;853      }
;;;854      else
;;;855      {
;;;856        /* SWSTART bit is reset */
;;;857        bitstatus = RESET;
000010  2000              MOVS     r0,#0
                  |L24.18|
;;;858      }
;;;859      
;;;860      /* Return the SWSTART bit status */
;;;861      return  bitstatus;
;;;862    }
000012  4770              BX       lr
;;;863    
                          ENDP


                          AREA ||i.ADC_GetSoftwareStartInjectedConvCmdStatus||, CODE, READONLY, ALIGN=1

                  ADC_GetSoftwareStartInjectedConvCmdStatus PROC
;;;1389     */
;;;1390   FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx)
000000  4601              MOV      r1,r0
;;;1391   {
;;;1392     FlagStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;1393     /* Check the parameters */
;;;1394     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1395     
;;;1396     /* Check the status of JSWSTART bit */
;;;1397     if ((ADCx->CR2 & ADC_CR2_JSWSTART) != (uint32_t)RESET)
000004  688a              LDR      r2,[r1,#8]
000006  f4120f80          TST      r2,#0x400000
00000a  d001              BEQ      |L25.16|
;;;1398     {
;;;1399       /* JSWSTART bit is set */
;;;1400       bitstatus = SET;
00000c  2001              MOVS     r0,#1
00000e  e000              B        |L25.18|
                  |L25.16|
;;;1401     }
;;;1402     else
;;;1403     {
;;;1404       /* JSWSTART bit is reset */
;;;1405       bitstatus = RESET;
000010  2000              MOVS     r0,#0
                  |L25.18|
;;;1406     }
;;;1407     /* Return the JSWSTART bit status */
;;;1408     return  bitstatus;
;;;1409   }
000012  4770              BX       lr
;;;1410   
                          ENDP


                          AREA ||i.ADC_ITConfig||, CODE, READONLY, ALIGN=1

                  ADC_ITConfig PROC
;;;1580     */
;;;1581   void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState)  
000000  b510              PUSH     {r4,lr}
;;;1582   {
000002  460b              MOV      r3,r1
;;;1583     uint32_t itmask = 0;
000004  2100              MOVS     r1,#0
;;;1584     /* Check the parameters */
;;;1585     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1586     assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;1587     assert_param(IS_ADC_IT(ADC_IT)); 
;;;1588   
;;;1589     /* Get the ADC IT index */
;;;1590     itmask = (uint8_t)ADC_IT;
000006  b2d9              UXTB     r1,r3
;;;1591     itmask = (uint32_t)0x01 << itmask;    
000008  2401              MOVS     r4,#1
00000a  fa04f101          LSL      r1,r4,r1
;;;1592   
;;;1593     if (NewState != DISABLE)
00000e  b11a              CBZ      r2,|L26.24|
;;;1594     {
;;;1595       /* Enable the selected ADC interrupts */
;;;1596       ADCx->CR1 |= itmask;
000010  6844              LDR      r4,[r0,#4]
000012  430c              ORRS     r4,r4,r1
000014  6044              STR      r4,[r0,#4]
000016  e002              B        |L26.30|
                  |L26.24|
;;;1597     }
;;;1598     else
;;;1599     {
;;;1600       /* Disable the selected ADC interrupts */
;;;1601       ADCx->CR1 &= (~(uint32_t)itmask);
000018  6844              LDR      r4,[r0,#4]
00001a  438c              BICS     r4,r4,r1
00001c  6044              STR      r4,[r0,#4]
                  |L26.30|
;;;1602     }
;;;1603   }
00001e  bd10              POP      {r4,pc}
;;;1604   
                          ENDP


                          AREA ||i.ADC_Init||, CODE, READONLY, ALIGN=2

                  ADC_Init PROC
;;;227      */
;;;228    void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
000000  b530              PUSH     {r4,r5,lr}
;;;229    {
000002  4602              MOV      r2,r0
;;;230      uint32_t tmpreg1 = 0;
000004  2000              MOVS     r0,#0
;;;231      uint8_t tmpreg2 = 0;
000006  2300              MOVS     r3,#0
;;;232      /* Check the parameters */
;;;233      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;234      assert_param(IS_ADC_RESOLUTION(ADC_InitStruct->ADC_Resolution)); 
;;;235      assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
;;;236      assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode)); 
;;;237      assert_param(IS_ADC_EXT_TRIG_EDGE(ADC_InitStruct->ADC_ExternalTrigConvEdge)); 
;;;238      assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));    
;;;239      assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); 
;;;240      assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfConversion));
;;;241      
;;;242      /*---------------------------- ADCx CR1 Configuration -----------------*/
;;;243      /* Get the ADCx CR1 value */
;;;244      tmpreg1 = ADCx->CR1;
000008  6850              LDR      r0,[r2,#4]
;;;245      
;;;246      /* Clear RES and SCAN bits */
;;;247      tmpreg1 &= CR1_CLEAR_MASK;
00000a  4c10              LDR      r4,|L27.76|
00000c  4020              ANDS     r0,r0,r4
;;;248      
;;;249      /* Configure ADCx: scan conversion mode and resolution */
;;;250      /* Set SCAN bit according to ADC_ScanConvMode value */
;;;251      /* Set RES bit according to ADC_Resolution value */ 
;;;252      tmpreg1 |= (uint32_t)(((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8) | \
00000e  790d              LDRB     r5,[r1,#4]
000010  680c              LDR      r4,[r1,#0]
000012  ea442405          ORR      r4,r4,r5,LSL #8
000016  4320              ORRS     r0,r0,r4
;;;253                                       ADC_InitStruct->ADC_Resolution);
;;;254      /* Write to ADCx CR1 */
;;;255      ADCx->CR1 = tmpreg1;
000018  6050              STR      r0,[r2,#4]
;;;256      /*---------------------------- ADCx CR2 Configuration -----------------*/
;;;257      /* Get the ADCx CR2 value */
;;;258      tmpreg1 = ADCx->CR2;
00001a  6890              LDR      r0,[r2,#8]
;;;259      
;;;260      /* Clear CONT, ALIGN, EXTEN and EXTSEL bits */
;;;261      tmpreg1 &= CR2_CLEAR_MASK;
00001c  4c0c              LDR      r4,|L27.80|
00001e  4020              ANDS     r0,r0,r4
;;;262      
;;;263      /* Configure ADCx: external trigger event and edge, data alignment and 
;;;264         continuous conversion mode */
;;;265      /* Set ALIGN bit according to ADC_DataAlign value */
;;;266      /* Set EXTEN bits according to ADC_ExternalTrigConvEdge value */ 
;;;267      /* Set EXTSEL bits according to ADC_ExternalTrigConv value */
;;;268      /* Set CONT bit according to ADC_ContinuousConvMode value */
;;;269      tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | \
000020  e9d15403          LDRD     r5,r4,[r1,#0xc]
000024  432c              ORRS     r4,r4,r5
000026  688d              LDR      r5,[r1,#8]
000028  432c              ORRS     r4,r4,r5
00002a  794d              LDRB     r5,[r1,#5]
00002c  ea440445          ORR      r4,r4,r5,LSL #1
000030  4320              ORRS     r0,r0,r4
;;;270                            ADC_InitStruct->ADC_ExternalTrigConv | 
;;;271                            ADC_InitStruct->ADC_ExternalTrigConvEdge | \
;;;272                            ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1));
;;;273                            
;;;274      /* Write to ADCx CR2 */
;;;275      ADCx->CR2 = tmpreg1;
000032  6090              STR      r0,[r2,#8]
;;;276      /*---------------------------- ADCx SQR1 Configuration -----------------*/
;;;277      /* Get the ADCx SQR1 value */
;;;278      tmpreg1 = ADCx->SQR1;
000034  6ad0              LDR      r0,[r2,#0x2c]
;;;279      
;;;280      /* Clear L bits */
;;;281      tmpreg1 &= SQR1_L_RESET;
000036  f4200070          BIC      r0,r0,#0xf00000
;;;282      
;;;283      /* Configure ADCx: regular channel sequence length */
;;;284      /* Set L bits according to ADC_NbrOfConversion value */
;;;285      tmpreg2 |= (uint8_t)(ADC_InitStruct->ADC_NbrOfConversion - (uint8_t)1);
00003a  7d0c              LDRB     r4,[r1,#0x14]
00003c  1e64              SUBS     r4,r4,#1
00003e  b2e4              UXTB     r4,r4
000040  4323              ORRS     r3,r3,r4
;;;286      tmpreg1 |= ((uint32_t)tmpreg2 << 20);
000042  ea405003          ORR      r0,r0,r3,LSL #20
;;;287      
;;;288      /* Write to ADCx SQR1 */
;;;289      ADCx->SQR1 = tmpreg1;
000046  62d0              STR      r0,[r2,#0x2c]
;;;290    }
000048  bd30              POP      {r4,r5,pc}
;;;291    
                          ENDP

00004a  0000              DCW      0x0000
                  |L27.76|
                          DCD      0xfcfffeff
                  |L27.80|
                          DCD      0xc0fff7fd

                          AREA ||i.ADC_InjectedChannelConfig||, CODE, READONLY, ALIGN=1

                  ADC_InjectedChannelConfig PROC
;;;1185     */
;;;1186   void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
000000  b5f0              PUSH     {r4-r7,lr}
;;;1187   {
000002  4604              MOV      r4,r0
000004  4615              MOV      r5,r2
;;;1188     uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0;
000006  2000              MOVS     r0,#0
000008  2200              MOVS     r2,#0
00000a  4684              MOV      r12,r0
;;;1189     /* Check the parameters */
;;;1190     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1191     assert_param(IS_ADC_CHANNEL(ADC_Channel));
;;;1192     assert_param(IS_ADC_INJECTED_RANK(Rank));
;;;1193     assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
;;;1194     /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
;;;1195     if (ADC_Channel > ADC_Channel_9)
00000c  2909              CMP      r1,#9
00000e  dd11              BLE      |L28.52|
;;;1196     {
;;;1197       /* Get the old register value */
;;;1198       tmpreg1 = ADCx->SMPR1;
000010  68e0              LDR      r0,[r4,#0xc]
;;;1199       /* Calculate the mask to clear */
;;;1200       tmpreg2 = SMPR1_SMP_SET << (3*(ADC_Channel - 10));
000012  f1a1060a          SUB      r6,r1,#0xa
000016  eb060746          ADD      r7,r6,r6,LSL #1
00001a  2607              MOVS     r6,#7
00001c  fa06f207          LSL      r2,r6,r7
;;;1201       /* Clear the old sample time */
;;;1202       tmpreg1 &= ~tmpreg2;
000020  4390              BICS     r0,r0,r2
;;;1203       /* Calculate the mask to set */
;;;1204       tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10));
000022  f1a1060a          SUB      r6,r1,#0xa
000026  eb060646          ADD      r6,r6,r6,LSL #1
00002a  fa03f206          LSL      r2,r3,r6
;;;1205       /* Set the new sample time */
;;;1206       tmpreg1 |= tmpreg2;
00002e  4310              ORRS     r0,r0,r2
;;;1207       /* Store the new register value */
;;;1208       ADCx->SMPR1 = tmpreg1;
000030  60e0              STR      r0,[r4,#0xc]
000032  e00c              B        |L28.78|
                  |L28.52|
;;;1209     }
;;;1210     else /* ADC_Channel include in ADC_Channel_[0..9] */
;;;1211     {
;;;1212       /* Get the old register value */
;;;1213       tmpreg1 = ADCx->SMPR2;
000034  6920              LDR      r0,[r4,#0x10]
;;;1214       /* Calculate the mask to clear */
;;;1215       tmpreg2 = SMPR2_SMP_SET << (3 * ADC_Channel);
000036  eb010741          ADD      r7,r1,r1,LSL #1
00003a  2607              MOVS     r6,#7
00003c  fa06f207          LSL      r2,r6,r7
;;;1216       /* Clear the old sample time */
;;;1217       tmpreg1 &= ~tmpreg2;
000040  4390              BICS     r0,r0,r2
;;;1218       /* Calculate the mask to set */
;;;1219       tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
000042  eb010641          ADD      r6,r1,r1,LSL #1
000046  fa03f206          LSL      r2,r3,r6
;;;1220       /* Set the new sample time */
;;;1221       tmpreg1 |= tmpreg2;
00004a  4310              ORRS     r0,r0,r2
;;;1222       /* Store the new register value */
;;;1223       ADCx->SMPR2 = tmpreg1;
00004c  6120              STR      r0,[r4,#0x10]
                  |L28.78|
;;;1224     }
;;;1225     /* Rank configuration */
;;;1226     /* Get the old register value */
;;;1227     tmpreg1 = ADCx->JSQR;
00004e  6ba0              LDR      r0,[r4,#0x38]
;;;1228     /* Get JL value: Number = JL+1 */
;;;1229     tmpreg3 =  (tmpreg1 & JSQR_JL_SET)>> 20;
000050  f3c05c01          UBFX     r12,r0,#20,#2
;;;1230     /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */
;;;1231     tmpreg2 = JSQR_JSQ_SET << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
000054  1cee              ADDS     r6,r5,#3
000056  f10c0701          ADD      r7,r12,#1
00005a  1bf6              SUBS     r6,r6,r7
00005c  eb060786          ADD      r7,r6,r6,LSL #2
000060  261f              MOVS     r6,#0x1f
000062  fa06f207          LSL      r2,r6,r7
;;;1232     /* Clear the old JSQx bits for the selected rank */
;;;1233     tmpreg1 &= ~tmpreg2;
000066  4390              BICS     r0,r0,r2
;;;1234     /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */
;;;1235     tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
000068  1cee              ADDS     r6,r5,#3
00006a  f10c0701          ADD      r7,r12,#1
00006e  1bf6              SUBS     r6,r6,r7
000070  eb060686          ADD      r6,r6,r6,LSL #2
000074  fa01f206          LSL      r2,r1,r6
;;;1236     /* Set the JSQx bits for the selected rank */
;;;1237     tmpreg1 |= tmpreg2;
000078  4310              ORRS     r0,r0,r2
;;;1238     /* Store the new register value */
;;;1239     ADCx->JSQR = tmpreg1;
00007a  63a0              STR      r0,[r4,#0x38]
;;;1240   }
00007c  bdf0              POP      {r4-r7,pc}
;;;1241   
                          ENDP


                          AREA ||i.ADC_InjectedDiscModeCmd||, CODE, READONLY, ALIGN=1

                  ADC_InjectedDiscModeCmd PROC
;;;1444     */
;;;1445   void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  b121              CBZ      r1,|L29.12|
;;;1446   {
;;;1447     /* Check the parameters */
;;;1448     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1449     assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;1450     if (NewState != DISABLE)
;;;1451     {
;;;1452       /* Enable the selected ADC injected discontinuous mode */
;;;1453       ADCx->CR1 |= (uint32_t)ADC_CR1_JDISCEN;
000002  6842              LDR      r2,[r0,#4]
000004  f4425280          ORR      r2,r2,#0x1000
000008  6042              STR      r2,[r0,#4]
00000a  e003              B        |L29.20|
                  |L29.12|
;;;1454     }
;;;1455     else
;;;1456     {
;;;1457       /* Disable the selected ADC injected discontinuous mode */
;;;1458       ADCx->CR1 &= (uint32_t)(~ADC_CR1_JDISCEN);
00000c  6842              LDR      r2,[r0,#4]
00000e  f4225280          BIC      r2,r2,#0x1000
000012  6042              STR      r2,[r0,#4]
                  |L29.20|
;;;1459     }
;;;1460   }
000014  4770              BX       lr
;;;1461   
                          ENDP


                          AREA ||i.ADC_InjectedSequencerLengthConfig||, CODE, READONLY, ALIGN=1

                  ADC_InjectedSequencerLengthConfig PROC
;;;1248     */
;;;1249   void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length)
000000  b510              PUSH     {r4,lr}
;;;1250   {
000002  460a              MOV      r2,r1
;;;1251     uint32_t tmpreg1 = 0;
000004  2100              MOVS     r1,#0
;;;1252     uint32_t tmpreg2 = 0;
000006  2300              MOVS     r3,#0
;;;1253     /* Check the parameters */
;;;1254     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1255     assert_param(IS_ADC_INJECTED_LENGTH(Length));
;;;1256     
;;;1257     /* Get the old register value */
;;;1258     tmpreg1 = ADCx->JSQR;
000008  6b81              LDR      r1,[r0,#0x38]
;;;1259     
;;;1260     /* Clear the old injected sequence length JL bits */
;;;1261     tmpreg1 &= JSQR_JL_RESET;
00000a  f4211140          BIC      r1,r1,#0x300000
;;;1262     
;;;1263     /* Set the injected sequence length JL bits */
;;;1264     tmpreg2 = Length - 1; 
00000e  1e53              SUBS     r3,r2,#1
;;;1265     tmpreg1 |= tmpreg2 << 20;
000010  ea415103          ORR      r1,r1,r3,LSL #20
;;;1266     
;;;1267     /* Store the new register value */
;;;1268     ADCx->JSQR = tmpreg1;
000014  6381              STR      r1,[r0,#0x38]
;;;1269   }
000016  bd10              POP      {r4,pc}
;;;1270   
                          ENDP


                          AREA ||i.ADC_MultiModeDMARequestAfterLastTransferCmd||, CODE, READONLY, ALIGN=2

                  ADC_MultiModeDMARequestAfterLastTransferCmd PROC
;;;1098     */
;;;1099   void ADC_MultiModeDMARequestAfterLastTransferCmd(FunctionalState NewState)
000000  b138              CBZ      r0,|L31.18|
;;;1100   {
;;;1101     /* Check the parameters */
;;;1102     assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;1103     if (NewState != DISABLE)
;;;1104     {
;;;1105       /* Enable the selected ADC DMA request after last transfer */
;;;1106       ADC->CCR |= (uint32_t)ADC_CCR_DDS;
000002  4908              LDR      r1,|L31.36|
000004  6809              LDR      r1,[r1,#0]
000006  f4415100          ORR      r1,r1,#0x2000
00000a  4a07              LDR      r2,|L31.40|
00000c  f8c21304          STR      r1,[r2,#0x304]
000010  e006              B        |L31.32|
                  |L31.18|
;;;1107     }
;;;1108     else
;;;1109     {
;;;1110       /* Disable the selected ADC DMA request after last transfer */
;;;1111       ADC->CCR &= (uint32_t)(~ADC_CCR_DDS);
000012  4904              LDR      r1,|L31.36|
000014  6809              LDR      r1,[r1,#0]
000016  f4215100          BIC      r1,r1,#0x2000
00001a  4a03              LDR      r2,|L31.40|
00001c  f8c21304          STR      r1,[r2,#0x304]
                  |L31.32|
;;;1112     }
;;;1113   }
000020  4770              BX       lr
;;;1114   /**
                          ENDP

000022  0000              DCW      0x0000
                  |L31.36|
                          DCD      0x40012304
                  |L31.40|
                          DCD      0x40012000

                          AREA ||i.ADC_RegularChannelConfig||, CODE, READONLY, ALIGN=1

                  ADC_RegularChannelConfig PROC
;;;707      */
;;;708    void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
000000  b570              PUSH     {r4-r6,lr}
;;;709    {
000002  4604              MOV      r4,r0
000004  468c              MOV      r12,r1
;;;710      uint32_t tmpreg1 = 0, tmpreg2 = 0;
000006  2000              MOVS     r0,#0
000008  2100              MOVS     r1,#0
;;;711      /* Check the parameters */
;;;712      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;713      assert_param(IS_ADC_CHANNEL(ADC_Channel));
;;;714      assert_param(IS_ADC_REGULAR_RANK(Rank));
;;;715      assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
;;;716      
;;;717      /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
;;;718      if (ADC_Channel > ADC_Channel_9)
00000a  f1bc0f09          CMP      r12,#9
00000e  dd11              BLE      |L32.52|
;;;719      {
;;;720        /* Get the old register value */
;;;721        tmpreg1 = ADCx->SMPR1;
000010  68e0              LDR      r0,[r4,#0xc]
;;;722        
;;;723        /* Calculate the mask to clear */
;;;724        tmpreg2 = SMPR1_SMP_SET << (3 * (ADC_Channel - 10));
000012  f1ac050a          SUB      r5,r12,#0xa
000016  eb050645          ADD      r6,r5,r5,LSL #1
00001a  2507              MOVS     r5,#7
00001c  fa05f106          LSL      r1,r5,r6
;;;725        
;;;726        /* Clear the old sample time */
;;;727        tmpreg1 &= ~tmpreg2;
000020  4388              BICS     r0,r0,r1
;;;728        
;;;729        /* Calculate the mask to set */
;;;730        tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10));
000022  f1ac050a          SUB      r5,r12,#0xa
000026  eb050545          ADD      r5,r5,r5,LSL #1
00002a  fa03f105          LSL      r1,r3,r5
;;;731        
;;;732        /* Set the new sample time */
;;;733        tmpreg1 |= tmpreg2;
00002e  4308              ORRS     r0,r0,r1
;;;734        
;;;735        /* Store the new register value */
;;;736        ADCx->SMPR1 = tmpreg1;
000030  60e0              STR      r0,[r4,#0xc]
000032  e00c              B        |L32.78|
                  |L32.52|
;;;737      }
;;;738      else /* ADC_Channel include in ADC_Channel_[0..9] */
;;;739      {
;;;740        /* Get the old register value */
;;;741        tmpreg1 = ADCx->SMPR2;
000034  6920              LDR      r0,[r4,#0x10]
;;;742        
;;;743        /* Calculate the mask to clear */
;;;744        tmpreg2 = SMPR2_SMP_SET << (3 * ADC_Channel);
000036  eb0c064c          ADD      r6,r12,r12,LSL #1
00003a  2507              MOVS     r5,#7
00003c  fa05f106          LSL      r1,r5,r6
;;;745        
;;;746        /* Clear the old sample time */
;;;747        tmpreg1 &= ~tmpreg2;
000040  4388              BICS     r0,r0,r1
;;;748        
;;;749        /* Calculate the mask to set */
;;;750        tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
000042  eb0c054c          ADD      r5,r12,r12,LSL #1
000046  fa03f105          LSL      r1,r3,r5
;;;751        
;;;752        /* Set the new sample time */
;;;753        tmpreg1 |= tmpreg2;
00004a  4308              ORRS     r0,r0,r1
;;;754        
;;;755        /* Store the new register value */
;;;756        ADCx->SMPR2 = tmpreg1;
00004c  6120              STR      r0,[r4,#0x10]
                  |L32.78|
;;;757      }
;;;758      /* For Rank 1 to 6 */
;;;759      if (Rank < 7)
00004e  2a07              CMP      r2,#7
000050  da0f              BGE      |L32.114|
;;;760      {
;;;761        /* Get the old register value */
;;;762        tmpreg1 = ADCx->SQR3;
000052  6b60              LDR      r0,[r4,#0x34]
;;;763        
;;;764        /* Calculate the mask to clear */
;;;765        tmpreg2 = SQR3_SQ_SET << (5 * (Rank - 1));
000054  1e55              SUBS     r5,r2,#1
000056  eb050685          ADD      r6,r5,r5,LSL #2
00005a  251f              MOVS     r5,#0x1f
00005c  fa05f106          LSL      r1,r5,r6
;;;766        
;;;767        /* Clear the old SQx bits for the selected rank */
;;;768        tmpreg1 &= ~tmpreg2;
000060  4388              BICS     r0,r0,r1
;;;769        
;;;770        /* Calculate the mask to set */
;;;771        tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1));
000062  1e55              SUBS     r5,r2,#1
000064  eb050585          ADD      r5,r5,r5,LSL #2
000068  fa0cf105          LSL      r1,r12,r5
;;;772        
;;;773        /* Set the SQx bits for the selected rank */
;;;774        tmpreg1 |= tmpreg2;
00006c  4308              ORRS     r0,r0,r1
;;;775        
;;;776        /* Store the new register value */
;;;777        ADCx->SQR3 = tmpreg1;
00006e  6360              STR      r0,[r4,#0x34]
000070  e022              B        |L32.184|
                  |L32.114|
;;;778      }
;;;779      /* For Rank 7 to 12 */
;;;780      else if (Rank < 13)
000072  2a0d              CMP      r2,#0xd
000074  da0f              BGE      |L32.150|
;;;781      {
;;;782        /* Get the old register value */
;;;783        tmpreg1 = ADCx->SQR2;
000076  6b20              LDR      r0,[r4,#0x30]
;;;784        
;;;785        /* Calculate the mask to clear */
;;;786        tmpreg2 = SQR2_SQ_SET << (5 * (Rank - 7));
000078  1fd5              SUBS     r5,r2,#7
00007a  eb050685          ADD      r6,r5,r5,LSL #2
00007e  251f              MOVS     r5,#0x1f
000080  fa05f106          LSL      r1,r5,r6
;;;787        
;;;788        /* Clear the old SQx bits for the selected rank */
;;;789        tmpreg1 &= ~tmpreg2;
000084  4388              BICS     r0,r0,r1
;;;790        
;;;791        /* Calculate the mask to set */
;;;792        tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7));
000086  1fd5              SUBS     r5,r2,#7
000088  eb050585          ADD      r5,r5,r5,LSL #2
00008c  fa0cf105          LSL      r1,r12,r5
;;;793        
;;;794        /* Set the SQx bits for the selected rank */
;;;795        tmpreg1 |= tmpreg2;
000090  4308              ORRS     r0,r0,r1
;;;796        
;;;797        /* Store the new register value */
;;;798        ADCx->SQR2 = tmpreg1;
000092  6320              STR      r0,[r4,#0x30]
000094  e010              B        |L32.184|
                  |L32.150|
;;;799      }
;;;800      /* For Rank 13 to 16 */
;;;801      else
;;;802      {
;;;803        /* Get the old register value */
;;;804        tmpreg1 = ADCx->SQR1;
000096  6ae0              LDR      r0,[r4,#0x2c]
;;;805        
;;;806        /* Calculate the mask to clear */
;;;807        tmpreg2 = SQR1_SQ_SET << (5 * (Rank - 13));
000098  f1a2050d          SUB      r5,r2,#0xd
00009c  eb050685          ADD      r6,r5,r5,LSL #2
0000a0  251f              MOVS     r5,#0x1f
0000a2  fa05f106          LSL      r1,r5,r6
;;;808        
;;;809        /* Clear the old SQx bits for the selected rank */
;;;810        tmpreg1 &= ~tmpreg2;
0000a6  4388              BICS     r0,r0,r1
;;;811        
;;;812        /* Calculate the mask to set */
;;;813        tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13));
0000a8  f1a2050d          SUB      r5,r2,#0xd
0000ac  eb050585          ADD      r5,r5,r5,LSL #2
0000b0  fa0cf105          LSL      r1,r12,r5
;;;814        
;;;815        /* Set the SQx bits for the selected rank */
;;;816        tmpreg1 |= tmpreg2;
0000b4  4308              ORRS     r0,r0,r1
;;;817        
;;;818        /* Store the new register value */
;;;819        ADCx->SQR1 = tmpreg1;
0000b6  62e0              STR      r0,[r4,#0x2c]
                  |L32.184|
;;;820      }
;;;821    }
0000b8  bd70              POP      {r4-r6,pc}
;;;822    
                          ENDP


                          AREA ||i.ADC_SetInjectedOffset||, CODE, READONLY, ALIGN=1

                  ADC_SetInjectedOffset PROC
;;;1283     */
;;;1284   void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset)
000000  b510              PUSH     {r4,lr}
;;;1285   {
;;;1286       __IO uint32_t tmp = 0;
000002  2300              MOVS     r3,#0
;;;1287     /* Check the parameters */
;;;1288     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1289     assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
;;;1290     assert_param(IS_ADC_OFFSET(Offset));
;;;1291     
;;;1292     tmp = (uint32_t)ADCx;
000004  4603              MOV      r3,r0
;;;1293     tmp += ADC_InjectedChannel;
000006  440b              ADD      r3,r3,r1
;;;1294     
;;;1295     /* Set the selected injected channel data offset */
;;;1296    *(__IO uint32_t *) tmp = (uint32_t)Offset;
000008  601a              STR      r2,[r3,#0]
;;;1297   }
00000a  bd10              POP      {r4,pc}
;;;1298   
                          ENDP


                          AREA ||i.ADC_SoftwareStartConv||, CODE, READONLY, ALIGN=1

                  ADC_SoftwareStartConv PROC
;;;827      */
;;;828    void ADC_SoftwareStartConv(ADC_TypeDef* ADCx)
000000  6881              LDR      r1,[r0,#8]
;;;829    {
;;;830      /* Check the parameters */
;;;831      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;832      
;;;833      /* Enable the selected ADC conversion for regular group */
;;;834      ADCx->CR2 |= (uint32_t)ADC_CR2_SWSTART;
000002  f0414180          ORR      r1,r1,#0x40000000
000006  6081              STR      r1,[r0,#8]
;;;835    }
000008  4770              BX       lr
;;;836    
                          ENDP


                          AREA ||i.ADC_SoftwareStartInjectedConv||, CODE, READONLY, ALIGN=1

                  ADC_SoftwareStartInjectedConv PROC
;;;1376     */
;;;1377   void ADC_SoftwareStartInjectedConv(ADC_TypeDef* ADCx)
000000  6881              LDR      r1,[r0,#8]
;;;1378   {
;;;1379     /* Check the parameters */
;;;1380     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1381     /* Enable the selected ADC conversion for injected group */
;;;1382     ADCx->CR2 |= (uint32_t)ADC_CR2_JSWSTART;
000002  f4410180          ORR      r1,r1,#0x400000
000006  6081              STR      r1,[r0,#8]
;;;1383   }
000008  4770              BX       lr
;;;1384   
                          ENDP


                          AREA ||i.ADC_StructInit||, CODE, READONLY, ALIGN=1

                  ADC_StructInit PROC
;;;302      */
;;;303    void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
000000  2100              MOVS     r1,#0
;;;304    {
;;;305      /* Initialize the ADC_Mode member */
;;;306      ADC_InitStruct->ADC_Resolution = ADC_Resolution_12b;
000002  6001              STR      r1,[r0,#0]
;;;307    
;;;308      /* initialize the ADC_ScanConvMode member */
;;;309      ADC_InitStruct->ADC_ScanConvMode = DISABLE;
000004  7101              STRB     r1,[r0,#4]
;;;310    
;;;311      /* Initialize the ADC_ContinuousConvMode member */
;;;312      ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
000006  7141              STRB     r1,[r0,#5]
;;;313    
;;;314      /* Initialize the ADC_ExternalTrigConvEdge member */
;;;315      ADC_InitStruct->ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
000008  6081              STR      r1,[r0,#8]
;;;316    
;;;317      /* Initialize the ADC_ExternalTrigConv member */
;;;318      ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
00000a  60c1              STR      r1,[r0,#0xc]
;;;319    
;;;320      /* Initialize the ADC_DataAlign member */
;;;321      ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
00000c  6101              STR      r1,[r0,#0x10]
;;;322    
;;;323      /* Initialize the ADC_NbrOfConversion member */
;;;324      ADC_InitStruct->ADC_NbrOfConversion = 1;
00000e  2101              MOVS     r1,#1
000010  7501              STRB     r1,[r0,#0x14]
;;;325    }
000012  4770              BX       lr
;;;326    
                          ENDP


                          AREA ||i.ADC_TempSensorVrefintCmd||, CODE, READONLY, ALIGN=2

                  ADC_TempSensorVrefintCmd PROC
;;;584      */
;;;585    void ADC_TempSensorVrefintCmd(FunctionalState NewState)                
000000  b138              CBZ      r0,|L37.18|
;;;586    {
;;;587      /* Check the parameters */
;;;588      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;589      if (NewState != DISABLE)
;;;590      {
;;;591        /* Enable the temperature sensor and Vrefint channel*/
;;;592        ADC->CCR |= (uint32_t)ADC_CCR_TSVREFE;
000002  4908              LDR      r1,|L37.36|
000004  6809              LDR      r1,[r1,#0]
000006  f4410100          ORR      r1,r1,#0x800000
00000a  4a07              LDR      r2,|L37.40|
00000c  f8c21304          STR      r1,[r2,#0x304]
000010  e006              B        |L37.32|
                  |L37.18|
;;;593      }
;;;594      else
;;;595      {
;;;596        /* Disable the temperature sensor and Vrefint channel*/
;;;597        ADC->CCR &= (uint32_t)(~ADC_CCR_TSVREFE);
000012  4904              LDR      r1,|L37.36|
000014  6809              LDR      r1,[r1,#0]
000016  f4210100          BIC      r1,r1,#0x800000
00001a  4a03              LDR      r2,|L37.40|
00001c  f8c21304          STR      r1,[r2,#0x304]
                  |L37.32|
;;;598      }
;;;599    }
000020  4770              BX       lr
;;;600    
                          ENDP

000022  0000              DCW      0x0000
                  |L37.36|
                          DCD      0x40012304
                  |L37.40|
                          DCD      0x40012000

                          AREA ||i.ADC_VBATCmd||, CODE, READONLY, ALIGN=2

                  ADC_VBATCmd PROC
;;;606      */
;;;607    void ADC_VBATCmd(FunctionalState NewState)                             
000000  b138              CBZ      r0,|L38.18|
;;;608    {
;;;609      /* Check the parameters */
;;;610      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;611      if (NewState != DISABLE)
;;;612      {
;;;613        /* Enable the VBAT channel*/
;;;614        ADC->CCR |= (uint32_t)ADC_CCR_VBATE;
000002  4908              LDR      r1,|L38.36|
000004  6809              LDR      r1,[r1,#0]
000006  f4410180          ORR      r1,r1,#0x400000
00000a  4a07              LDR      r2,|L38.40|
00000c  f8c21304          STR      r1,[r2,#0x304]
000010  e006              B        |L38.32|
                  |L38.18|
;;;615      }
;;;616      else
;;;617      {
;;;618        /* Disable the VBAT channel*/
;;;619        ADC->CCR &= (uint32_t)(~ADC_CCR_VBATE);
000012  4904              LDR      r1,|L38.36|
000014  6809              LDR      r1,[r1,#0]
000016  f4210180          BIC      r1,r1,#0x400000
00001a  4a03              LDR      r2,|L38.40|
00001c  f8c21304          STR      r1,[r2,#0x304]
                  |L38.32|
;;;620      }
;;;621    }
000020  4770              BX       lr
;;;622    
                          ENDP

000022  0000              DCW      0x0000
                  |L38.36|
                          DCD      0x40012304
                  |L38.40|
                          DCD      0x40012000

;*** Start embedded assembler ***

#line 1 "..\\..\\..\\Libraries\\STM32F4xx_StdPeriph_Driver\\src\\stm32f4xx_adc.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___15_stm32f4xx_adc_c_e11a2ea2____REV16|
#line 114 "C:\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___15_stm32f4xx_adc_c_e11a2ea2____REV16| PROC
#line 115

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___15_stm32f4xx_adc_c_e11a2ea2____REVSH|
#line 128
|__asm___15_stm32f4xx_adc_c_e11a2ea2____REVSH| PROC
#line 129

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
