; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\STM324xG_EVAL\stm324xg_eval_fsmc_sram.o --asm_dir=.\STM324xG_EVAL\ --list_dir=.\STM324xG_EVAL\ --depend=.\STM324xG_EVAL\stm324xg_eval_fsmc_sram.d --cpu=Cortex-M4.fp --apcs=interwork -O0 -Otime -I..\ -I..\..\..\Libraries\CMSIS\Device\ST\STM32F4xx\Include -I..\..\..\Libraries\STM32F4xx_StdPeriph_Driver\inc -I..\..\..\Utilities\STM32_EVAL\Common -I..\..\..\Utilities\STM32_EVAL\STM3240_41_G_EVAL -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\Inc\ST\STM32F4xx -D__MICROLIB -DUSE_STM324xG_EVAL -DSTM32F4XX -DUSE_STDPERIPH_DRIVER --omf_browse=.\STM324xG_EVAL\stm324xg_eval_fsmc_sram.crf ..\..\..\Utilities\STM32_EVAL\STM3240_41_G_EVAL\stm324xg_eval_fsmc_sram.c]
                          THUMB

                          AREA ||i.SRAM_Init||, CODE, READONLY, ALIGN=2

                  SRAM_Init PROC
;;;100      */
;;;101    void SRAM_Init(void)
000000  b500              PUSH     {lr}
;;;102    {
000002  b099              SUB      sp,sp,#0x64
;;;103      FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;
;;;104      FSMC_NORSRAMTimingInitTypeDef  p;
;;;105      GPIO_InitTypeDef GPIO_InitStructure; 
;;;106      
;;;107      /* Enable GPIOs clock */
;;;108      RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |
000004  2101              MOVS     r1,#1
000006  2078              MOVS     r0,#0x78
000008  f7fffffe          BL       RCC_AHB1PeriphClockCmd
;;;109                             RCC_AHB1Periph_GPIOG, ENABLE);
;;;110    
;;;111      /* Enable FSMC clock */
;;;112      RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); 
00000c  2101              MOVS     r1,#1
00000e  4608              MOV      r0,r1
000010  f7fffffe          BL       RCC_AHB3PeriphClockCmd
;;;113      
;;;114    /*-- GPIOs Configuration -----------------------------------------------------*/
;;;115    /*
;;;116     +-------------------+--------------------+------------------+------------------+
;;;117     +                       SRAM pins assignment                                   +
;;;118     +-------------------+--------------------+------------------+------------------+
;;;119     | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 | 
;;;120     | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 | 
;;;121     | PD4  <-> FSMC_NOE | PE3  <-> FSMC_A19  | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 | 
;;;122     | PD5  <-> FSMC_NWE | PE4  <-> FSMC_A20  | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 | 
;;;123     | PD8  <-> FSMC_D13 | PE7  <-> FSMC_D4   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 | 
;;;124     | PD9  <-> FSMC_D14 | PE8  <-> FSMC_D5   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 | 
;;;125     | PD10 <-> FSMC_D15 | PE9  <-> FSMC_D6   | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | 
;;;126     | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7   | PF13 <-> FSMC_A7 |------------------+
;;;127     | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8   | PF14 <-> FSMC_A8 | 
;;;128     | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9   | PF15 <-> FSMC_A9 | 
;;;129     | PD14 <-> FSMC_D0  | PE13 <-> FSMC_D10  |------------------+
;;;130     | PD15 <-> FSMC_D1  | PE14 <-> FSMC_D11  |
;;;131     |                   | PE15 <-> FSMC_D12  |
;;;132     +-------------------+--------------------+
;;;133    */
;;;134    
;;;135      /* GPIOD configuration */
;;;136      GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);
000014  220c              MOVS     r2,#0xc
000016  2100              MOVS     r1,#0
000018  4891              LDR      r0,|L1.608|
00001a  f7fffffe          BL       GPIO_PinAFConfig
;;;137      GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);
00001e  220c              MOVS     r2,#0xc
000020  2101              MOVS     r1,#1
000022  488f              LDR      r0,|L1.608|
000024  f7fffffe          BL       GPIO_PinAFConfig
;;;138      GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);
000028  220c              MOVS     r2,#0xc
00002a  2104              MOVS     r1,#4
00002c  488c              LDR      r0,|L1.608|
00002e  f7fffffe          BL       GPIO_PinAFConfig
;;;139      GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);
000032  220c              MOVS     r2,#0xc
000034  2105              MOVS     r1,#5
000036  488a              LDR      r0,|L1.608|
000038  f7fffffe          BL       GPIO_PinAFConfig
;;;140      GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);
00003c  220c              MOVS     r2,#0xc
00003e  2108              MOVS     r1,#8
000040  4887              LDR      r0,|L1.608|
000042  f7fffffe          BL       GPIO_PinAFConfig
;;;141      GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);
000046  220c              MOVS     r2,#0xc
000048  2109              MOVS     r1,#9
00004a  4885              LDR      r0,|L1.608|
00004c  f7fffffe          BL       GPIO_PinAFConfig
;;;142      GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);
000050  220c              MOVS     r2,#0xc
000052  210a              MOVS     r1,#0xa
000054  4882              LDR      r0,|L1.608|
000056  f7fffffe          BL       GPIO_PinAFConfig
;;;143      GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC); 
00005a  220c              MOVS     r2,#0xc
00005c  210b              MOVS     r1,#0xb
00005e  4880              LDR      r0,|L1.608|
000060  f7fffffe          BL       GPIO_PinAFConfig
;;;144      GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);
000064  220c              MOVS     r2,#0xc
000066  4611              MOV      r1,r2
000068  487d              LDR      r0,|L1.608|
00006a  f7fffffe          BL       GPIO_PinAFConfig
;;;145      GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);
00006e  220c              MOVS     r2,#0xc
000070  210d              MOVS     r1,#0xd
000072  487b              LDR      r0,|L1.608|
000074  f7fffffe          BL       GPIO_PinAFConfig
;;;146      GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);
000078  220c              MOVS     r2,#0xc
00007a  210e              MOVS     r1,#0xe
00007c  4878              LDR      r0,|L1.608|
00007e  f7fffffe          BL       GPIO_PinAFConfig
;;;147      GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);
000082  220c              MOVS     r2,#0xc
000084  210f              MOVS     r1,#0xf
000086  4876              LDR      r0,|L1.608|
000088  f7fffffe          BL       GPIO_PinAFConfig
;;;148    
;;;149      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | 
00008c  f64f7033          MOV      r0,#0xff33
000090  9001              STR      r0,[sp,#4]
;;;150                                    GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 |
;;;151                                    GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
;;;152      GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
000092  2002              MOVS     r0,#2
000094  f88d0008          STRB     r0,[sp,#8]
;;;153      GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
000098  2003              MOVS     r0,#3
00009a  f88d0009          STRB     r0,[sp,#9]
;;;154      GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
00009e  2000              MOVS     r0,#0
0000a0  f88d000a          STRB     r0,[sp,#0xa]
;;;155      GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_NOPULL;
0000a4  f88d000b          STRB     r0,[sp,#0xb]
;;;156    
;;;157      GPIO_Init(GPIOD, &GPIO_InitStructure);
0000a8  a901              ADD      r1,sp,#4
0000aa  486d              LDR      r0,|L1.608|
0000ac  f7fffffe          BL       GPIO_Init
;;;158    
;;;159    
;;;160      /* GPIOE configuration */
;;;161      GPIO_PinAFConfig(GPIOE, GPIO_PinSource0 , GPIO_AF_FSMC);
0000b0  220c              MOVS     r2,#0xc
0000b2  2100              MOVS     r1,#0
0000b4  486b              LDR      r0,|L1.612|
0000b6  f7fffffe          BL       GPIO_PinAFConfig
;;;162      GPIO_PinAFConfig(GPIOE, GPIO_PinSource1 , GPIO_AF_FSMC);
0000ba  220c              MOVS     r2,#0xc
0000bc  2101              MOVS     r1,#1
0000be  4869              LDR      r0,|L1.612|
0000c0  f7fffffe          BL       GPIO_PinAFConfig
;;;163      GPIO_PinAFConfig(GPIOE, GPIO_PinSource3 , GPIO_AF_FSMC);
0000c4  220c              MOVS     r2,#0xc
0000c6  2103              MOVS     r1,#3
0000c8  4866              LDR      r0,|L1.612|
0000ca  f7fffffe          BL       GPIO_PinAFConfig
;;;164      GPIO_PinAFConfig(GPIOE, GPIO_PinSource4 , GPIO_AF_FSMC);
0000ce  220c              MOVS     r2,#0xc
0000d0  2104              MOVS     r1,#4
0000d2  4864              LDR      r0,|L1.612|
0000d4  f7fffffe          BL       GPIO_PinAFConfig
;;;165      GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC);
0000d8  220c              MOVS     r2,#0xc
0000da  2107              MOVS     r1,#7
0000dc  4861              LDR      r0,|L1.612|
0000de  f7fffffe          BL       GPIO_PinAFConfig
;;;166      GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC);
0000e2  220c              MOVS     r2,#0xc
0000e4  2108              MOVS     r1,#8
0000e6  485f              LDR      r0,|L1.612|
0000e8  f7fffffe          BL       GPIO_PinAFConfig
;;;167      GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC);
0000ec  220c              MOVS     r2,#0xc
0000ee  2109              MOVS     r1,#9
0000f0  485c              LDR      r0,|L1.612|
0000f2  f7fffffe          BL       GPIO_PinAFConfig
;;;168      GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC);
0000f6  220c              MOVS     r2,#0xc
0000f8  210a              MOVS     r1,#0xa
0000fa  485a              LDR      r0,|L1.612|
0000fc  f7fffffe          BL       GPIO_PinAFConfig
;;;169      GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC);
000100  220c              MOVS     r2,#0xc
000102  210b              MOVS     r1,#0xb
000104  4857              LDR      r0,|L1.612|
000106  f7fffffe          BL       GPIO_PinAFConfig
;;;170      GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC);
00010a  220c              MOVS     r2,#0xc
00010c  4611              MOV      r1,r2
00010e  4855              LDR      r0,|L1.612|
000110  f7fffffe          BL       GPIO_PinAFConfig
;;;171      GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC);
000114  220c              MOVS     r2,#0xc
000116  210d              MOVS     r1,#0xd
000118  4852              LDR      r0,|L1.612|
00011a  f7fffffe          BL       GPIO_PinAFConfig
;;;172      GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC);
00011e  220c              MOVS     r2,#0xc
000120  210e              MOVS     r1,#0xe
000122  4850              LDR      r0,|L1.612|
000124  f7fffffe          BL       GPIO_PinAFConfig
;;;173      GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);
000128  220c              MOVS     r2,#0xc
00012a  210f              MOVS     r1,#0xf
00012c  484d              LDR      r0,|L1.612|
00012e  f7fffffe          BL       GPIO_PinAFConfig
;;;174    
;;;175      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_3 | GPIO_Pin_4 |
000132  f64f709b          MOV      r0,#0xff9b
000136  9001              STR      r0,[sp,#4]
;;;176                                    GPIO_Pin_7  | GPIO_Pin_8  | GPIO_Pin_9  | GPIO_Pin_10 |
;;;177                                    GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
;;;178                                    GPIO_Pin_15;
;;;179    
;;;180      GPIO_Init(GPIOE, &GPIO_InitStructure);
000138  a901              ADD      r1,sp,#4
00013a  484a              LDR      r0,|L1.612|
00013c  f7fffffe          BL       GPIO_Init
;;;181    
;;;182    
;;;183      /* GPIOF configuration */
;;;184      GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC);
000140  220c              MOVS     r2,#0xc
000142  2100              MOVS     r1,#0
000144  4848              LDR      r0,|L1.616|
000146  f7fffffe          BL       GPIO_PinAFConfig
;;;185      GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC);
00014a  220c              MOVS     r2,#0xc
00014c  2101              MOVS     r1,#1
00014e  4846              LDR      r0,|L1.616|
000150  f7fffffe          BL       GPIO_PinAFConfig
;;;186      GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC);
000154  220c              MOVS     r2,#0xc
000156  2102              MOVS     r1,#2
000158  4843              LDR      r0,|L1.616|
00015a  f7fffffe          BL       GPIO_PinAFConfig
;;;187      GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC);
00015e  220c              MOVS     r2,#0xc
000160  2103              MOVS     r1,#3
000162  4841              LDR      r0,|L1.616|
000164  f7fffffe          BL       GPIO_PinAFConfig
;;;188      GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC);
000168  220c              MOVS     r2,#0xc
00016a  2104              MOVS     r1,#4
00016c  483e              LDR      r0,|L1.616|
00016e  f7fffffe          BL       GPIO_PinAFConfig
;;;189      GPIO_PinAFConfig(GPIOF, GPIO_PinSource5 , GPIO_AF_FSMC);
000172  220c              MOVS     r2,#0xc
000174  2105              MOVS     r1,#5
000176  483c              LDR      r0,|L1.616|
000178  f7fffffe          BL       GPIO_PinAFConfig
;;;190      GPIO_PinAFConfig(GPIOF, GPIO_PinSource12 , GPIO_AF_FSMC);
00017c  220c              MOVS     r2,#0xc
00017e  4611              MOV      r1,r2
000180  4839              LDR      r0,|L1.616|
000182  f7fffffe          BL       GPIO_PinAFConfig
;;;191      GPIO_PinAFConfig(GPIOF, GPIO_PinSource13 , GPIO_AF_FSMC);
000186  220c              MOVS     r2,#0xc
000188  210d              MOVS     r1,#0xd
00018a  4837              LDR      r0,|L1.616|
00018c  f7fffffe          BL       GPIO_PinAFConfig
;;;192      GPIO_PinAFConfig(GPIOF, GPIO_PinSource14 , GPIO_AF_FSMC);
000190  220c              MOVS     r2,#0xc
000192  210e              MOVS     r1,#0xe
000194  4834              LDR      r0,|L1.616|
000196  f7fffffe          BL       GPIO_PinAFConfig
;;;193      GPIO_PinAFConfig(GPIOF, GPIO_PinSource15 , GPIO_AF_FSMC);
00019a  220c              MOVS     r2,#0xc
00019c  210f              MOVS     r1,#0xf
00019e  4832              LDR      r0,|L1.616|
0001a0  f7fffffe          BL       GPIO_PinAFConfig
;;;194    
;;;195      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_2  | GPIO_Pin_3 | 
0001a4  f24f003f          MOV      r0,#0xf03f
0001a8  9001              STR      r0,[sp,#4]
;;;196                                    GPIO_Pin_4  | GPIO_Pin_5  | 
;;;197                                    GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;      
;;;198    
;;;199      GPIO_Init(GPIOF, &GPIO_InitStructure);
0001aa  a901              ADD      r1,sp,#4
0001ac  482e              LDR      r0,|L1.616|
0001ae  f7fffffe          BL       GPIO_Init
;;;200    
;;;201    
;;;202      /* GPIOG configuration */
;;;203      GPIO_PinAFConfig(GPIOG, GPIO_PinSource0 , GPIO_AF_FSMC);
0001b2  220c              MOVS     r2,#0xc
0001b4  2100              MOVS     r1,#0
0001b6  482d              LDR      r0,|L1.620|
0001b8  f7fffffe          BL       GPIO_PinAFConfig
;;;204      GPIO_PinAFConfig(GPIOG, GPIO_PinSource1 , GPIO_AF_FSMC);
0001bc  220c              MOVS     r2,#0xc
0001be  2101              MOVS     r1,#1
0001c0  482a              LDR      r0,|L1.620|
0001c2  f7fffffe          BL       GPIO_PinAFConfig
;;;205      GPIO_PinAFConfig(GPIOG, GPIO_PinSource2 , GPIO_AF_FSMC);
0001c6  220c              MOVS     r2,#0xc
0001c8  2102              MOVS     r1,#2
0001ca  4828              LDR      r0,|L1.620|
0001cc  f7fffffe          BL       GPIO_PinAFConfig
;;;206      GPIO_PinAFConfig(GPIOG, GPIO_PinSource3 , GPIO_AF_FSMC);
0001d0  220c              MOVS     r2,#0xc
0001d2  2103              MOVS     r1,#3
0001d4  4825              LDR      r0,|L1.620|
0001d6  f7fffffe          BL       GPIO_PinAFConfig
;;;207      GPIO_PinAFConfig(GPIOG, GPIO_PinSource4 , GPIO_AF_FSMC);
0001da  220c              MOVS     r2,#0xc
0001dc  2104              MOVS     r1,#4
0001de  4823              LDR      r0,|L1.620|
0001e0  f7fffffe          BL       GPIO_PinAFConfig
;;;208      GPIO_PinAFConfig(GPIOG, GPIO_PinSource5 , GPIO_AF_FSMC);
0001e4  220c              MOVS     r2,#0xc
0001e6  2105              MOVS     r1,#5
0001e8  4820              LDR      r0,|L1.620|
0001ea  f7fffffe          BL       GPIO_PinAFConfig
;;;209      GPIO_PinAFConfig(GPIOG, GPIO_PinSource9 , GPIO_AF_FSMC);
0001ee  220c              MOVS     r2,#0xc
0001f0  2109              MOVS     r1,#9
0001f2  481e              LDR      r0,|L1.620|
0001f4  f7fffffe          BL       GPIO_PinAFConfig
;;;210    
;;;211      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_2  | GPIO_Pin_3 | 
0001f8  f240203f          MOV      r0,#0x23f
0001fc  9001              STR      r0,[sp,#4]
;;;212                                    GPIO_Pin_4  | GPIO_Pin_5  |GPIO_Pin_9;      
;;;213    
;;;214      GPIO_Init(GPIOG, &GPIO_InitStructure);
0001fe  a901              ADD      r1,sp,#4
000200  481a              LDR      r0,|L1.620|
000202  f7fffffe          BL       GPIO_Init
;;;215    
;;;216    /*-- FSMC Configuration ------------------------------------------------------*/
;;;217      p.FSMC_AddressSetupTime = 3;
000206  2003              MOVS     r0,#3
000208  9003              STR      r0,[sp,#0xc]
;;;218      p.FSMC_AddressHoldTime = 0;
00020a  2000              MOVS     r0,#0
00020c  9004              STR      r0,[sp,#0x10]
;;;219      p.FSMC_DataSetupTime = 6;
00020e  2006              MOVS     r0,#6
000210  9005              STR      r0,[sp,#0x14]
;;;220      p.FSMC_BusTurnAroundDuration = 1;
000212  2001              MOVS     r0,#1
000214  9006              STR      r0,[sp,#0x18]
;;;221      p.FSMC_CLKDivision = 0;
000216  2000              MOVS     r0,#0
000218  9007              STR      r0,[sp,#0x1c]
;;;222      p.FSMC_DataLatency = 0;
00021a  9008              STR      r0,[sp,#0x20]
;;;223      p.FSMC_AccessMode = FSMC_AccessMode_A;
00021c  9009              STR      r0,[sp,#0x24]
;;;224    
;;;225      FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
00021e  2002              MOVS     r0,#2
000220  900a              STR      r0,[sp,#0x28]
;;;226      FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
000222  2000              MOVS     r0,#0
000224  900b              STR      r0,[sp,#0x2c]
;;;227      FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
000226  2004              MOVS     r0,#4
000228  900c              STR      r0,[sp,#0x30]
;;;228      FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
00022a  2010              MOVS     r0,#0x10
00022c  900d              STR      r0,[sp,#0x34]
;;;229      FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
00022e  2000              MOVS     r0,#0
000230  900e              STR      r0,[sp,#0x38]
;;;230      FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;  
000232  900f              STR      r0,[sp,#0x3c]
;;;231      FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
000234  9010              STR      r0,[sp,#0x40]
;;;232      FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
000236  9011              STR      r0,[sp,#0x44]
;;;233      FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
000238  9012              STR      r0,[sp,#0x48]
;;;234      FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
00023a  f44f5080          MOV      r0,#0x1000
00023e  9013              STR      r0,[sp,#0x4c]
;;;235      FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
000240  2000              MOVS     r0,#0
000242  9014              STR      r0,[sp,#0x50]
;;;236      FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
000244  9015              STR      r0,[sp,#0x54]
;;;237      FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
000246  9016              STR      r0,[sp,#0x58]
;;;238      FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
000248  a803              ADD      r0,sp,#0xc
00024a  9017              STR      r0,[sp,#0x5c]
;;;239      FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
00024c  9018              STR      r0,[sp,#0x60]
;;;240    
;;;241      FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); 
00024e  a80a              ADD      r0,sp,#0x28
000250  f7fffffe          BL       FSMC_NORSRAMInit
;;;242    
;;;243      /*!< Enable FSMC Bank1_SRAM2 Bank */
;;;244      FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); 
000254  2101              MOVS     r1,#1
000256  2002              MOVS     r0,#2
000258  f7fffffe          BL       FSMC_NORSRAMCmd
;;;245    
;;;246    }
00025c  b019              ADD      sp,sp,#0x64
00025e  bd00              POP      {pc}
;;;247    
                          ENDP

                  |L1.608|
                          DCD      0x40020c00
                  |L1.612|
                          DCD      0x40021000
                  |L1.616|
                          DCD      0x40021400
                  |L1.620|
                          DCD      0x40021800

                          AREA ||i.SRAM_ReadBuffer||, CODE, READONLY, ALIGN=1

                  SRAM_ReadBuffer PROC
;;;275      */
;;;276    void SRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead)
000000  e006              B        |L2.16|
                  |L2.2|
;;;277    {
;;;278      for (; NumHalfwordToRead != 0; NumHalfwordToRead--) /* while there is data to read */
;;;279      {
;;;280        /* Read a half-word from the memory */
;;;281        *pBuffer++ = *(__IO uint16_t*) (Bank1_SRAM2_ADDR + ReadAddr);
000002  f04f43c8          MOV      r3,#0x64000000
000006  5a5b              LDRH     r3,[r3,r1]
000008  f8203b02          STRH     r3,[r0],#2
;;;282    
;;;283        /* Increment the address*/
;;;284        ReadAddr += 2;
00000c  1c89              ADDS     r1,r1,#2
00000e  1e52              SUBS     r2,r2,#1              ;278
                  |L2.16|
000010  2a00              CMP      r2,#0                 ;278
000012  d1f6              BNE      |L2.2|
;;;285      }
;;;286    }
000014  4770              BX       lr
;;;287    
                          ENDP


                          AREA ||i.SRAM_WriteBuffer||, CODE, READONLY, ALIGN=1

                  SRAM_WriteBuffer PROC
;;;255      */
;;;256    void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite)
000000  b510              PUSH     {r4,lr}
;;;257    {
;;;258      for (; NumHalfwordToWrite != 0; NumHalfwordToWrite--) /* while there is data to write */
000002  e006              B        |L3.18|
                  |L3.4|
;;;259      {
;;;260        /* Transfer data to the memory */
;;;261        *(uint16_t *) (Bank1_SRAM2_ADDR + WriteAddr) = *pBuffer++;
000004  f8304b02          LDRH     r4,[r0],#2
000008  f04f43c8          MOV      r3,#0x64000000
00000c  525c              STRH     r4,[r3,r1]
;;;262    
;;;263        /* Increment the address*/
;;;264        WriteAddr += 2;
00000e  1c89              ADDS     r1,r1,#2
000010  1e52              SUBS     r2,r2,#1              ;258
                  |L3.18|
000012  2a00              CMP      r2,#0                 ;258
000014  d1f6              BNE      |L3.4|
;;;265      }
;;;266    }
000016  bd10              POP      {r4,pc}
;;;267    
                          ENDP


;*** Start embedded assembler ***

#line 1 "..\\..\\..\\Utilities\\STM32_EVAL\\STM3240_41_G_EVAL\\stm324xg_eval_fsmc_sram.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___25_stm324xg_eval_fsmc_sram_c_162e3695____REV16|
#line 114 "C:\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___25_stm324xg_eval_fsmc_sram_c_162e3695____REV16| PROC
#line 115

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___25_stm324xg_eval_fsmc_sram_c_162e3695____REVSH|
#line 128
|__asm___25_stm324xg_eval_fsmc_sram_c_162e3695____REVSH| PROC
#line 129

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
